1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s 3 4;;; Test extract intrinsic instructions 5;;; 6;;; Note: 7;;; We test extract_vm512u and extract_vm512l pseudo instructions. 8 9; Function Attrs: nounwind readnone 10define fastcc <256 x i1> @extract_vm512u(<512 x i1> %0) { 11; CHECK-LABEL: extract_vm512u: 12; CHECK: # %bb.0: 13; CHECK-NEXT: andm %vm1, %vm0, %vm2 14; CHECK-NEXT: b.l.t (, %s10) 15 %2 = tail call <256 x i1> @llvm.ve.vl.extract.vm512u(<512 x i1> %0) 16 ret <256 x i1> %2 17} 18 19; Function Attrs: nounwind readnone 20declare <256 x i1> @llvm.ve.vl.extract.vm512u(<512 x i1>) 21 22; Function Attrs: nounwind readnone 23define fastcc <256 x i1> @extract_vm512l(<512 x i1> %0) { 24; CHECK-LABEL: extract_vm512l: 25; CHECK: # %bb.0: 26; CHECK-NEXT: andm %vm1, %vm0, %vm3 27; CHECK-NEXT: b.l.t (, %s10) 28 %2 = tail call <256 x i1> @llvm.ve.vl.extract.vm512l(<512 x i1> %0) 29 ret <256 x i1> %2 30} 31 32; Function Attrs: nounwind readnone 33declare <256 x i1> @llvm.ve.vl.extract.vm512l(<512 x i1>) 34