1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s 3 4declare <512 x i32> @llvm.vp.mul.v512i32(<512 x i32>, <512 x i32>, <512 x i1>, i32) 5 6define fastcc <512 x i32> @test_vp_v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n) { 7; CHECK-LABEL: test_vp_v512i32: 8; CHECK: # %bb.0: 9; CHECK-NEXT: adds.w.sx %s1, 1, %s0 10; CHECK-NEXT: and %s1, %s1, (32)0 11; CHECK-NEXT: srl %s1, %s1, 1 12; CHECK-NEXT: lvl %s1 13; CHECK-NEXT: vshf %v2, %v1, %v1, 0 14; CHECK-NEXT: vshf %v3, %v0, %v0, 0 15; CHECK-NEXT: vmuls.w.sx %v2, %v3, %v2, %vm2 16; CHECK-NEXT: and %s0, %s0, (32)0 17; CHECK-NEXT: srl %s0, %s0, 1 18; CHECK-NEXT: lvl %s0 19; CHECK-NEXT: vmuls.w.sx %v0, %v0, %v1, %vm3 20; CHECK-NEXT: lvl %s1 21; CHECK-NEXT: vshf %v0, %v0, %v2, 13 22; CHECK-NEXT: b.l.t (, %s10) 23 %r0 = call <512 x i32> @llvm.vp.mul.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n) 24 ret <512 x i32> %r0 25} 26