1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s 3 4declare void @llvm.masked.store.v512f32.p0(<512 x float>, ptr, i32 immarg, <512 x i1>) 5 6define fastcc void @vec_mstore_v512f32(ptr %P, <512 x float> %V, <512 x i1> %M) { 7; CHECK-LABEL: vec_mstore_v512f32: 8; CHECK: # %bb.0: 9; CHECK-NEXT: lea %s1, 256 10; CHECK-NEXT: lvl %s1 11; CHECK-NEXT: vstu %v0, 8, %s0 12; CHECK-NEXT: vshf %v0, %v0, %v0, 4 13; CHECK-NEXT: lea %s0, 4(, %s0) 14; CHECK-NEXT: vstu %v0, 8, %s0 15; CHECK-NEXT: b.l.t (, %s10) 16 call void @llvm.masked.store.v512f32.p0(<512 x float> %V, ptr %P, i32 16, <512 x i1> %M) 17 ret void 18} 19 20 21declare void @llvm.masked.store.v512i32.p0(<512 x i32>, ptr, i32 immarg, <512 x i1>) 22 23define fastcc void @vec_mstore_v512i32(ptr %P, <512 x i32> %V, <512 x i1> %M) { 24; CHECK-LABEL: vec_mstore_v512i32: 25; CHECK: # %bb.0: 26; CHECK-NEXT: lea %s1, 4(, %s0) 27; CHECK-NEXT: lea %s2, 256 28; CHECK-NEXT: lvl %s2 29; CHECK-NEXT: vstl %v0, 8, %s1 30; CHECK-NEXT: vshf %v0, %v0, %v0, 0 31; CHECK-NEXT: vstl %v0, 8, %s0 32; CHECK-NEXT: b.l.t (, %s10) 33 call void @llvm.masked.store.v512i32.p0(<512 x i32> %V, ptr %P, i32 16, <512 x i1> %M) 34 ret void 35} 36