xref: /llvm-project/llvm/test/CodeGen/VE/Packed/vec_load.ll (revision b006b60dc993b2e0ba3e412c80709477241b6be6) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s
3
4declare <512 x float> @llvm.masked.load.v512f32.p0(ptr %0, i32 immarg %1, <512 x i1> %2, <512 x float> %3) #0
5
6; Function Attrs: nounwind
7define fastcc <512 x float> @vec_mload_v512f32(ptr %P, <512 x i1> %M) {
8; CHECK-LABEL: vec_mload_v512f32:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    lea %s1, 256
11; CHECK-NEXT:    lvl %s1
12; CHECK-NEXT:    vldu %v0, 8, %s0
13; CHECK-NEXT:    lea %s0, 4(, %s0)
14; CHECK-NEXT:    vldu %v1, 8, %s0
15; CHECK-NEXT:    vshf %v0, %v1, %v0, 8
16; CHECK-NEXT:    b.l.t (, %s10)
17  %r = call <512 x float> @llvm.masked.load.v512f32.p0(ptr %P, i32 16, <512 x i1> %M, <512 x float> undef)
18  ret <512 x float> %r
19}
20
21; TODO: Packed select legalization
22; Function Attrs: nounwind
23; define fastcc <512 x float> @vec_mload_pt_v512f32(ptr %P, <512 x float> %PT, <512 x i1> %M) {
24;   %r = call <512 x float> @llvm.masked.load.v512f32.p0(ptr %P, i32 16, <512 x i1> %M, <512 x float> %PT)
25;   ret <512 x float> %r
26; }
27
28declare <512 x i32> @llvm.masked.load.v512i32.p0(ptr %0, i32 immarg %1, <512 x i1> %2, <512 x i32> %3) #0
29
30; Function Attrs: nounwind
31define fastcc <512 x i32> @vec_mload_v512i32(ptr %P, <512 x i1> %M) {
32; CHECK-LABEL: vec_mload_v512i32:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    lea %s1, 256
35; CHECK-NEXT:    lvl %s1
36; CHECK-NEXT:    vldl.zx %v0, 8, %s0
37; CHECK-NEXT:    lea %s0, 4(, %s0)
38; CHECK-NEXT:    vldl.zx %v1, 8, %s0
39; CHECK-NEXT:    vshf %v0, %v1, %v0, 13
40; CHECK-NEXT:    b.l.t (, %s10)
41  %r = call <512 x i32> @llvm.masked.load.v512i32.p0(ptr %P, i32 16, <512 x i1> %M, <512 x i32> undef)
42  ret <512 x i32> %r
43}
44
45; TODO: Packed select legalization
46; ; Function Attrs: nounwind
47; define fastcc <512 x i32> @vec_mload_pt_v512i32(ptr %P, <512 x i32> %PT, <512 x i1> %M) {
48;   %r = call <512 x i32> @llvm.masked.load.v512i32.p0(ptr %P, i32 16, <512 x i1> %M, <512 x i32> %PT)
49;   ret <512 x i32> %r
50; }
51
52attributes #0 = { argmemonly nounwind readonly willreturn }
53