1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=thumb-linux-androideabi -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=THUMB 3; RUN: llc < %s -mtriple=arm-linux-androideabi -mcpu=arm1156t2-s -verify-machineinstrs | FileCheck %s -check-prefix=ARM 4 5 6; Just to prevent the alloca from being optimized away 7declare void @dummy_use(ptr, i32) 8 9define void @test_basic() #0 { 10; THUMB-LABEL: test_basic: 11; THUMB: @ %bb.0: 12; THUMB-NEXT: push {r4, r5} 13; THUMB-NEXT: mrc p15, #0, r4, c13, c0, #3 14; THUMB-NEXT: mov r5, sp 15; THUMB-NEXT: ldr.w r4, [r4, #252] 16; THUMB-NEXT: cmp r4, r5 17; THUMB-NEXT: bls .LBB0_2 18; THUMB-NEXT: @ %bb.1: 19; THUMB-NEXT: mov r4, #48 20; THUMB-NEXT: mov r5, #0 21; THUMB-NEXT: push {lr} 22; THUMB-NEXT: bl __morestack 23; THUMB-NEXT: ldr lr, [sp], #4 24; THUMB-NEXT: pop {r4, r5} 25; THUMB-NEXT: bx lr 26; THUMB-NEXT: .LBB0_2: 27; THUMB-NEXT: pop {r4, r5} 28; THUMB-NEXT: .save {r7, lr} 29; THUMB-NEXT: push {r7, lr} 30; THUMB-NEXT: .pad #40 31; THUMB-NEXT: sub sp, #40 32; THUMB-NEXT: mov r0, sp 33; THUMB-NEXT: movs r1, #10 34; THUMB-NEXT: bl dummy_use 35; THUMB-NEXT: add sp, #40 36; THUMB-NEXT: pop {r7, pc} 37; 38; ARM-LABEL: test_basic: 39; ARM: @ %bb.0: 40; ARM-NEXT: push {r4, r5} 41; ARM-NEXT: mrc p15, #0, r4, c13, c0, #3 42; ARM-NEXT: mov r5, sp 43; ARM-NEXT: ldr r4, [r4, #252] 44; ARM-NEXT: cmp r4, r5 45; ARM-NEXT: bls .LBB0_2 46; ARM-NEXT: @ %bb.1: 47; ARM-NEXT: mov r4, #48 48; ARM-NEXT: mov r5, #0 49; ARM-NEXT: stmdb sp!, {lr} 50; ARM-NEXT: bl __morestack 51; ARM-NEXT: ldm sp!, {lr} 52; ARM-NEXT: pop {r4, r5} 53; ARM-NEXT: bx lr 54; ARM-NEXT: .LBB0_2: 55; ARM-NEXT: pop {r4, r5} 56; ARM-NEXT: .save {r11, lr} 57; ARM-NEXT: push {r11, lr} 58; ARM-NEXT: .pad #40 59; ARM-NEXT: sub sp, sp, #40 60; ARM-NEXT: mov r0, sp 61; ARM-NEXT: mov r1, #10 62; ARM-NEXT: bl dummy_use 63; ARM-NEXT: add sp, sp, #40 64; ARM-NEXT: pop {r11, pc} 65 %mem = alloca i32, i32 10 66 call void @dummy_use (ptr %mem, i32 10) 67 ret void 68} 69 70define void @test_large() #0 { 71 %mem = alloca i32, i32 10000 72 call void @dummy_use (ptr %mem, i32 0) 73 ret void 74 75; THUMB-LABEL: test_large: 76 77; THUMB: push {r4, r5} 78; THUMB-NEXT: mov r5, sp 79; THUMB-NEXT: movw r4, #40192 80; THUMB-NEXT: sub r5, r5, r4 81; THUMB-NEXT: mrc p15, #0, r4, c13, c0, #3 82; THUMB-NEXT: ldr.w r4, [r4, #252] 83; THUMB-NEXT: cmp r4, r5 84; THUMB-NEXT: bls .LBB1_2 85 86; THUMB: movw r4, #40192 87; THUMB-NEXT: mov r5, #0 88; THUMB-NEXT: push {lr} 89; THUMB-NEXT: bl __morestack 90; THUMB-NEXT: ldr lr, [sp], #4 91; THUMB-NEXT: pop {r4, r5} 92; THUMB-NEXT: bx lr 93 94; THUMB: pop {r4, r5} 95 96 97; ARM-LABEL: test_large: 98 99; ARM: push {r4, r5} 100; ARM-NEXT: ldr r4, .LCPI1_0 101; ARM-NEXT: sub r5, sp, r4 102; ARM-NEXT: mrc p15, #0, r4, c13, c0, #3 103; ARM-NEXT: ldr r4, [r4, #252] 104; ARM-NEXT: cmp r4, r5 105; ARM-NEXT: bls .LBB1_2 106 107; ARM: ldr r4, .LCPI1_0 108; ARM-NEXT: mov r5, #0 109; ARM-NEXT: stmdb sp!, {lr} 110; ARM-NEXT: bl __morestack 111; ARM-NEXT: ldm sp!, {lr} 112; ARM-NEXT: pop {r4, r5} 113; ARM-NEXT: bx lr 114 115; ARM: pop {r4, r5} 116 117; ARM: .LCPI1_0: 118; ARM-NEXT: .long 40192 119 120} 121 122define fastcc void @test_fastcc_large() #0 { 123 %mem = alloca i32, i32 10000 124 call void @dummy_use (ptr %mem, i32 0) 125 ret void 126 127; THUMB-LABEL: test_fastcc_large: 128 129; THUMB: push {r4, r5} 130; THUMB-NEXT: mov r5, sp 131; THUMB-NEXT: movw r4, #40192 132; THUMB-NEXT: sub r5, r5, r4 133; THUMB-NEXT: mrc p15, #0, r4, c13, c0, #3 134; THUMB-NEXT: ldr.w r4, [r4, #252] 135; THUMB-NEXT: cmp r4, r5 136; THUMB-NEXT: bls .LBB2_2 137 138; THUMB: movw r4, #40192 139; THUMB-NEXT: mov r5, #0 140; THUMB-NEXT: push {lr} 141; THUMB-NEXT: bl __morestack 142; THUMB-NEXT: ldr lr, [sp], #4 143; THUMB-NEXT: pop {r4, r5} 144; THUMB-NEXT: bx lr 145 146; THUMB: pop {r4, r5} 147 148; ARM-LABEL: test_fastcc_large: 149 150; ARM: push {r4, r5} 151; ARM-NEXT: ldr r4, .LCPI2_0 152; ARM-NEXT: sub r5, sp, r4 153; ARM-NEXT: mrc p15, #0, r4, c13, c0, #3 154; ARM-NEXT: ldr r4, [r4, #252] 155; ARM-NEXT: cmp r4, r5 156; ARM-NEXT: bls .LBB2_2 157 158; ARM: ldr r4, .LCPI2_0 159; ARM-NEXT: mov r5, #0 160; ARM-NEXT: stmdb sp!, {lr} 161; ARM-NEXT: bl __morestack 162; ARM-NEXT: ldm sp!, {lr} 163; ARM-NEXT: pop {r4, r5} 164; ARM-NEXT: bx lr 165 166; ARM: .LCPI2_0: 167; ARM-NEXT: .long 40192 168} 169 170 171declare void @panic() unnamed_addr 172 173; We used to crash while compiling the following function. 174; THUMB-LABEL: build_should_not_segfault: 175; ARM-LABEL: build_should_not_segfault: 176define void @build_should_not_segfault(i8 %x) unnamed_addr #0 { 177start: 178 %_0 = icmp ult i8 %x, 16 179 %or.cond = select i1 undef, i1 true, i1 %_0 180 br i1 %or.cond, label %bb1, label %bb2 181 182bb1: 183 ret void 184 185bb2: 186 call void @panic() 187 unreachable 188} 189 190attributes #0 = { "split-stack" } 191