1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK 3 4define arm_aapcs_vfpcc void @test32(ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y, ptr nocapture %z, i32 %n) { 5; CHECK-LABEL: test32: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: cmp r3, #1 8; CHECK-NEXT: it lt 9; CHECK-NEXT: bxlt lr 10; CHECK-NEXT: .LBB0_1: @ %vector.body.preheader 11; CHECK-NEXT: .save {r4, r5, r7, lr} 12; CHECK-NEXT: push {r4, r5, r7, lr} 13; CHECK-NEXT: .LBB0_2: @ %vector.body 14; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 15; CHECK-NEXT: vldrw.u32 q0, [r0], #16 16; CHECK-NEXT: vldrw.u32 q1, [r1], #16 17; CHECK-NEXT: subs r3, #4 18; CHECK-NEXT: vmullb.s32 q2, q1, q0 19; CHECK-NEXT: vmullt.s32 q3, q1, q0 20; CHECK-NEXT: vmov r12, r5, d5 21; CHECK-NEXT: lsrl r12, r5, #31 22; CHECK-NEXT: vmov r4, r5, d4 23; CHECK-NEXT: lsrl r4, r5, #31 24; CHECK-NEXT: vmov q2[2], q2[0], r4, r12 25; CHECK-NEXT: vmov r12, r5, d7 26; CHECK-NEXT: lsrl r12, r5, #31 27; CHECK-NEXT: vmov r4, r5, d6 28; CHECK-NEXT: lsrl r4, r5, #31 29; CHECK-NEXT: vmov q2[3], q2[1], r4, r12 30; CHECK-NEXT: vstrb.8 q2, [r2], #16 31; CHECK-NEXT: bne .LBB0_2 32; CHECK-NEXT: @ %bb.3: 33; CHECK-NEXT: pop.w {r4, r5, r7, lr} 34; CHECK-NEXT: bx lr 35entry: 36 %0 = and i32 %n, 3 37 %cmp = icmp eq i32 %0, 0 38 %cmp113 = icmp sgt i32 %n, 0 39 br i1 %cmp113, label %vector.body, label %for.cond.cleanup 40 41vector.body: ; preds = %vector.body, %entry 42 %index = phi i32 [ %index.next, %vector.body ], [ 0, %entry ] 43 %1 = getelementptr inbounds i32, ptr %x, i32 %index 44 %wide.load = load <4 x i32>, ptr %1, align 4 45 %2 = shufflevector <4 x i32> %wide.load, <4 x i32> %wide.load, <2 x i32> <i32 0, i32 2> 46 %3 = shufflevector <4 x i32> %wide.load, <4 x i32> %wide.load, <2 x i32> <i32 1, i32 3> 47 %4 = sext <2 x i32> %2 to <2 x i64> 48 %5 = sext <2 x i32> %3 to <2 x i64> 49 %6 = getelementptr inbounds i32, ptr %y, i32 %index 50 %wide.load15 = load <4 x i32>, ptr %6, align 4 51 %7 = shufflevector <4 x i32> %wide.load15, <4 x i32> %wide.load15, <2 x i32> <i32 0, i32 2> 52 %8 = shufflevector <4 x i32> %wide.load15, <4 x i32> %wide.load15, <2 x i32> <i32 1, i32 3> 53 %9 = sext <2 x i32> %7 to <2 x i64> 54 %10 = sext <2 x i32> %8 to <2 x i64> 55 %11 = mul <2 x i64> %9, %4 56 %12 = mul <2 x i64> %10, %5 57 %13 = lshr <2 x i64> %11, <i64 31, i64 31> 58 %14 = lshr <2 x i64> %12, <i64 31, i64 31> 59 %15 = shufflevector <2 x i64> %13, <2 x i64> %14, <4 x i32> <i32 0, i32 2, i32 1, i32 3> 60 %16 = trunc <4 x i64> %15 to <4 x i32> 61 %17 = getelementptr inbounds i32, ptr %z, i32 %index 62 store <4 x i32> %16, ptr %17, align 4 63 %index.next = add i32 %index, 4 64 %18 = icmp eq i32 %index.next, %n 65 br i1 %18, label %for.cond.cleanup, label %vector.body 66 67for.cond.cleanup: ; preds = %vector.body, %entry 68 ret void 69} 70 71define arm_aapcs_vfpcc void @test16(ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y, ptr nocapture %z, i32 %n) { 72; CHECK-LABEL: test16: 73; CHECK: @ %bb.0: @ %entry 74; CHECK-NEXT: cmp r3, #1 75; CHECK-NEXT: it lt 76; CHECK-NEXT: bxlt lr 77; CHECK-NEXT: .LBB1_1: @ %vector.body 78; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 79; CHECK-NEXT: vldrh.u16 q0, [r0], #16 80; CHECK-NEXT: vldrh.u16 q1, [r1], #16 81; CHECK-NEXT: subs r3, #8 82; CHECK-NEXT: vmullt.s16 q2, q1, q0 83; CHECK-NEXT: vmullb.s16 q0, q1, q0 84; CHECK-NEXT: vshr.u32 q2, q2, #15 85; CHECK-NEXT: vshr.u32 q0, q0, #15 86; CHECK-NEXT: vmovnt.i32 q0, q2 87; CHECK-NEXT: vstrb.8 q0, [r2], #16 88; CHECK-NEXT: bne .LBB1_1 89; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup 90; CHECK-NEXT: bx lr 91entry: 92 %0 = and i32 %n, 7 93 %cmp = icmp eq i32 %0, 0 94 %cmp113 = icmp sgt i32 %n, 0 95 br i1 %cmp113, label %vector.body, label %for.cond.cleanup 96 97vector.body: ; preds = %vector.body, %entry 98 %index = phi i32 [ %index.next, %vector.body ], [ 0, %entry ] 99 %1 = getelementptr inbounds i16, ptr %x, i32 %index 100 %wide.load = load <8 x i16>, ptr %1, align 2 101 %2 = shufflevector <8 x i16> %wide.load, <8 x i16> %wide.load, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 102 %3 = shufflevector <8 x i16> %wide.load, <8 x i16> %wide.load, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 103 %4 = sext <4 x i16> %2 to <4 x i32> 104 %5 = sext <4 x i16> %3 to <4 x i32> 105 %6 = getelementptr inbounds i16, ptr %y, i32 %index 106 %wide.load15 = load <8 x i16>, ptr %6, align 2 107 %7 = shufflevector <8 x i16> %wide.load15, <8 x i16> %wide.load15, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 108 %8 = shufflevector <8 x i16> %wide.load15, <8 x i16> %wide.load15, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 109 %9 = sext <4 x i16> %7 to <4 x i32> 110 %10 = sext <4 x i16> %8 to <4 x i32> 111 %11 = mul <4 x i32> %9, %4 112 %12 = mul <4 x i32> %10, %5 113 %13 = lshr <4 x i32> %11, <i32 15, i32 15, i32 15, i32 15> 114 %14 = lshr <4 x i32> %12, <i32 15, i32 15, i32 15, i32 15> 115 %15 = shufflevector <4 x i32> %13, <4 x i32> %14, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7> 116 %16 = trunc <8 x i32> %15 to <8 x i16> 117 %17 = getelementptr inbounds i16, ptr %z, i32 %index 118 store <8 x i16> %16, ptr %17, align 2 119 %index.next = add i32 %index, 8 120 %18 = icmp eq i32 %index.next, %n 121 br i1 %18, label %for.cond.cleanup, label %vector.body 122 123for.cond.cleanup: ; preds = %vector.body, %entry 124 ret void 125} 126 127define arm_aapcs_vfpcc void @test8(ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y, ptr nocapture %z, i32 %n) { 128; CHECK-LABEL: test8: 129; CHECK: @ %bb.0: @ %entry 130; CHECK-NEXT: cmp r3, #1 131; CHECK-NEXT: it lt 132; CHECK-NEXT: bxlt lr 133; CHECK-NEXT: .LBB2_1: @ %vector.body 134; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 135; CHECK-NEXT: vldrb.u8 q0, [r0], #16 136; CHECK-NEXT: vldrb.u8 q1, [r1], #16 137; CHECK-NEXT: subs r3, #16 138; CHECK-NEXT: vmullt.u8 q2, q1, q0 139; CHECK-NEXT: vmullb.u8 q0, q1, q0 140; CHECK-NEXT: vshr.u16 q2, q2, #7 141; CHECK-NEXT: vshr.u16 q0, q0, #7 142; CHECK-NEXT: vmovnt.i16 q0, q2 143; CHECK-NEXT: vstrb.8 q0, [r2], #16 144; CHECK-NEXT: bne .LBB2_1 145; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup 146; CHECK-NEXT: bx lr 147entry: 148 %0 = and i32 %n, 15 149 %cmp = icmp eq i32 %0, 0 150 %cmp117 = icmp sgt i32 %n, 0 151 br i1 %cmp117, label %vector.body, label %for.cond.cleanup 152 153vector.body: ; preds = %vector.body, %entry 154 %index = phi i32 [ %index.next, %vector.body ], [ 0, %entry ] 155 %1 = getelementptr inbounds i8, ptr %x, i32 %index 156 %wide.load = load <16 x i8>, ptr %1, align 1 157 %2 = shufflevector <16 x i8> %wide.load, <16 x i8> %wide.load, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 158 %3 = shufflevector <16 x i8> %wide.load, <16 x i8> %wide.load, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 159 %4 = zext <8 x i8> %2 to <8 x i16> 160 %5 = zext <8 x i8> %3 to <8 x i16> 161 %6 = getelementptr inbounds i8, ptr %y, i32 %index 162 %wide.load19 = load <16 x i8>, ptr %6, align 1 163 %7 = shufflevector <16 x i8> %wide.load19, <16 x i8> %wide.load19, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 164 %8 = shufflevector <16 x i8> %wide.load19, <16 x i8> %wide.load19, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 165 %9 = zext <8 x i8> %7 to <8 x i16> 166 %10 = zext <8 x i8> %8 to <8 x i16> 167 %11 = mul <8 x i16> %9, %4 168 %12 = mul <8 x i16> %10, %5 169 %13 = lshr <8 x i16> %11, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> 170 %14 = lshr <8 x i16> %12, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> 171 %15 = shufflevector <8 x i16> %13, <8 x i16> %14, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 172 %16 = trunc <16 x i16> %15 to <16 x i8> 173 %17 = getelementptr inbounds i8, ptr %z, i32 %index 174 store <16 x i8> %16, ptr %17, align 1 175 %index.next = add i32 %index, 16 176 %18 = icmp eq i32 %index.next, %n 177 br i1 %18, label %for.cond.cleanup, label %vector.body 178 179for.cond.cleanup: ; preds = %vector.body, %entry 180 ret void 181} 182