xref: /llvm-project/llvm/test/CodeGen/Thumb/cmp-fold.ll (revision dc206be77b329b0a83414f8c9440cb8983071622)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs < %s | FileCheck %s
3
4define i32 @subs(i32 %a, i32 %b) {
5; CHECK-LABEL: subs:
6; CHECK:       @ %bb.0: @ %entry
7; CHECK-NEXT:    subs r0, r0, r1
8; CHECK-NEXT:    beq .LBB0_2
9; CHECK-NEXT:  @ %bb.1: @ %false
10; CHECK-NEXT:    movs r0, #5
11; CHECK-NEXT:    bx lr
12; CHECK-NEXT:  .LBB0_2: @ %true
13; CHECK-NEXT:    movs r0, #4
14; CHECK-NEXT:    bx lr
15entry:
16  %c = sub i32 %a, %b
17  %d = icmp eq i32 %c, 0
18  br i1 %d, label %true, label %false
19
20true:
21  ret i32 4
22
23false:
24  ret i32 5
25}
26
27define i32 @addsrr(i32 %a, i32 %b) {
28; CHECK-LABEL: addsrr:
29; CHECK:       @ %bb.0: @ %entry
30; CHECK-NEXT:    adds r0, r0, r1
31; CHECK-NEXT:    beq .LBB1_2
32; CHECK-NEXT:  @ %bb.1: @ %false
33; CHECK-NEXT:    movs r0, #5
34; CHECK-NEXT:    bx lr
35; CHECK-NEXT:  .LBB1_2: @ %true
36; CHECK-NEXT:    movs r0, #4
37; CHECK-NEXT:    bx lr
38entry:
39  %c = add i32 %a, %b
40  %d = icmp eq i32 %c, 0
41  br i1 %d, label %true, label %false
42
43true:
44  ret i32 4
45
46false:
47  ret i32 5
48}
49
50define i32 @lslri(i32 %a, i32 %b) {
51; CHECK-LABEL: lslri:
52; CHECK:       @ %bb.0: @ %entry
53; CHECK-NEXT:    lsls r0, r0, #3
54; CHECK-NEXT:    beq .LBB2_2
55; CHECK-NEXT:  @ %bb.1: @ %false
56; CHECK-NEXT:    movs r0, #5
57; CHECK-NEXT:    bx lr
58; CHECK-NEXT:  .LBB2_2: @ %true
59; CHECK-NEXT:    movs r0, #4
60; CHECK-NEXT:    bx lr
61entry:
62  %c = shl i32 %a, 3
63  %d = icmp eq i32 %c, 0
64  br i1 %d, label %true, label %false
65
66true:
67  ret i32 4
68
69false:
70  ret i32 5
71}
72
73define i32 @lslrr(i32 %a, i32 %b) {
74; CHECK-LABEL: lslrr:
75; CHECK:       @ %bb.0: @ %entry
76; CHECK-NEXT:    lsls r0, r1
77; CHECK-NEXT:    beq .LBB3_2
78; CHECK-NEXT:  @ %bb.1: @ %false
79; CHECK-NEXT:    movs r0, #5
80; CHECK-NEXT:    bx lr
81; CHECK-NEXT:  .LBB3_2: @ %true
82; CHECK-NEXT:    movs r0, #4
83; CHECK-NEXT:    bx lr
84entry:
85  %c = shl i32 %a, %b
86  %d = icmp eq i32 %c, 0
87  br i1 %d, label %true, label %false
88
89true:
90  ret i32 4
91
92false:
93  ret i32 5
94}
95