1; Test that vector zexts are done efficently also in case of fewer elements 2; than allowed, e.g. <2 x i32>. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 5 6 7define <2 x i16> @fun1(<2 x i8> %val1) { 8; CHECK-LABEL: fun1: 9; CHECK: vuplhb %v24, %v24 10; CHECK-NEXT: br %r14 11 %z = zext <2 x i8> %val1 to <2 x i16> 12 ret <2 x i16> %z 13} 14 15define <2 x i32> @fun2(<2 x i8> %val1) { 16; CHECK-LABEL: fun2: 17; CHECK: larl %r1, .LCPI1_0 18; CHECK-NEXT: vl %v0, 0(%r1), 3 19; CHECK-NEXT: vperm %v24, %v0, %v24, %v0 20; CHECK-NEXT: br %r14 21 %z = zext <2 x i8> %val1 to <2 x i32> 22 ret <2 x i32> %z 23} 24 25define <2 x i64> @fun3(<2 x i8> %val1) { 26; CHECK-LABEL: fun3: 27; CHECK: larl %r1, .LCPI2_0 28; CHECK-NEXT: vl %v0, 0(%r1), 3 29; CHECK-NEXT: vperm %v24, %v0, %v24, %v0 30; CHECK-NEXT: br %r14 31 %z = zext <2 x i8> %val1 to <2 x i64> 32 ret <2 x i64> %z 33} 34 35define <2 x i32> @fun4(<2 x i16> %val1) { 36; CHECK-LABEL: fun4: 37; CHECK: vuplhh %v24, %v24 38; CHECK-NEXT: br %r14 39 %z = zext <2 x i16> %val1 to <2 x i32> 40 ret <2 x i32> %z 41} 42 43define <2 x i64> @fun5(<2 x i16> %val1) { 44; CHECK-LABEL: fun5: 45; CHECK: larl %r1, .LCPI4_0 46; CHECK-NEXT: vl %v0, 0(%r1), 3 47; CHECK-NEXT: vperm %v24, %v0, %v24, %v0 48; CHECK-NEXT: br %r14 49 %z = zext <2 x i16> %val1 to <2 x i64> 50 ret <2 x i64> %z 51} 52 53define <2 x i64> @fun6(<2 x i32> %val1) { 54; CHECK-LABEL: fun6: 55; CHECK: vuplhf %v24, %v24 56; CHECK-NEXT: br %r14 57 %z = zext <2 x i32> %val1 to <2 x i64> 58 ret <2 x i64> %z 59} 60 61define <4 x i16> @fun7(<4 x i8> %val1) { 62; CHECK-LABEL: fun7: 63; CHECK: vuplhb %v24, %v24 64; CHECK-NEXT: br %r14 65 %z = zext <4 x i8> %val1 to <4 x i16> 66 ret <4 x i16> %z 67} 68 69define <4 x i32> @fun8(<4 x i8> %val1) { 70; CHECK-LABEL: fun8: 71; CHECK: larl %r1, .LCPI7_0 72; CHECK-NEXT: vl %v0, 0(%r1), 3 73; CHECK-NEXT: vperm %v24, %v0, %v24, %v0 74; CHECK-NEXT: br %r14 75 %z = zext <4 x i8> %val1 to <4 x i32> 76 ret <4 x i32> %z 77} 78 79define <4 x i32> @fun9(<4 x i16> %val1) { 80; CHECK-LABEL: fun9: 81; CHECK: vuplhh %v24, %v24 82; CHECK-NEXT: br %r14 83 %z = zext <4 x i16> %val1 to <4 x i32> 84 ret <4 x i32> %z 85} 86 87define <8 x i16> @fun10(<8 x i8> %val1) { 88; CHECK-LABEL: fun10: 89; CHECK: vuplhb %v24, %v24 90; CHECK-NEXT: br %r14 91 %z = zext <8 x i8> %val1 to <8 x i16> 92 ret <8 x i16> %z 93} 94 95define <2 x i32> @fun11(<2 x i64> %Arg1, <2 x i64> %Arg2) { 96; CHECK-LABEL: fun11: 97; CHECK: vgbm %v0, 0 98; CHECK-NEXT: vceqg %v1, %v24, %v0 99; CHECK-NEXT: vceqg %v0, %v26, %v0 100; CHECK-NEXT: vo %v0, %v1, %v0 101; CHECK-NEXT: vrepig %v1, 1 102; CHECK-NEXT: vn %v0, %v0, %v1 103; CHECK-NEXT: vpkg %v24, %v0, %v0 104; CHECK-NEXT: br %r14 105 %i3 = icmp eq <2 x i64> %Arg1, zeroinitializer 106 %i5 = icmp eq <2 x i64> %Arg2, zeroinitializer 107 %i6 = or <2 x i1> %i3, %i5 108 %i7 = zext <2 x i1> %i6 to <2 x i32> 109 ret <2 x i32> %i7 110} 111