1; Test strict vector addition on z14. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s 4 5declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata) 6declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata) 7declare <1 x fp128> @llvm.experimental.constrained.fadd.v1f128(<1 x fp128>, <1 x fp128>, metadata, metadata) 8 9; Test a v4f32 addition. 10define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1, 11 <4 x float> %val2) strictfp { 12; CHECK-LABEL: f1: 13; CHECK: vfasb %v24, %v26, %v28 14; CHECK: br %r14 15 %ret = call <4 x float> @llvm.experimental.constrained.fadd.v4f32( 16 <4 x float> %val1, <4 x float> %val2, 17 metadata !"round.dynamic", 18 metadata !"fpexcept.strict") strictfp 19 ret <4 x float> %ret 20} 21 22; Test an f32 addition that uses vector registers. 23define float @f2(<4 x float> %val1, <4 x float> %val2) strictfp { 24; CHECK-LABEL: f2: 25; CHECK: wfasb %f0, %v24, %v26 26; CHECK: br %r14 27 %scalar1 = extractelement <4 x float> %val1, i32 0 28 %scalar2 = extractelement <4 x float> %val2, i32 0 29 %ret = call float @llvm.experimental.constrained.fadd.f32( 30 float %scalar1, float %scalar2, 31 metadata !"round.dynamic", 32 metadata !"fpexcept.strict") strictfp 33 ret float %ret 34} 35 36; Test a v1f128 addition. 37define <1 x fp128> @f3(<1 x fp128> %dummy, <1 x fp128> %val1, 38 <1 x fp128> %val2) strictfp { 39; CHECK-LABEL: f3: 40; CHECK: wfaxb %v24, %v26, %v28 41; CHECK: br %r14 42 %ret = call <1 x fp128> @llvm.experimental.constrained.fadd.v1f128( 43 <1 x fp128> %val1, <1 x fp128> %val2, 44 metadata !"round.dynamic", 45 metadata !"fpexcept.strict") strictfp 46 ret <1 x fp128> %ret 47} 48 49