xref: /llvm-project/llvm/test/CodeGen/SystemZ/vec-args-08.ll (revision 59f7f35a9047cccded7b8d3a01926e03f1e10efa)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Verify that we handle single-element vector types correctly.
3
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5
6define void @f1(<1 x i128> %a, ptr %ptr) {
7; CHECK-LABEL: f1:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    vst %v24, 0(%r2), 3
10; CHECK-NEXT:    br %r14
11  store <1 x i128> %a, ptr %ptr
12  ret void
13}
14
15define <1 x i128> @f2() {
16; CHECK-LABEL: f2:
17; CHECK:       # %bb.0:
18; CHECK-NEXT:    vgbm %v24, 0
19; CHECK-NEXT:    br %r14
20  ret <1 x i128><i128 0>
21}
22
23declare void @bar3(<1 x i128>)
24
25define void @f3() {
26; CHECK-LABEL: f3:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
29; CHECK-NEXT:    .cfi_offset %r14, -48
30; CHECK-NEXT:    .cfi_offset %r15, -40
31; CHECK-NEXT:    aghi %r15, -160
32; CHECK-NEXT:    .cfi_def_cfa_offset 320
33; CHECK-NEXT:    vgbm %v24, 0
34; CHECK-NEXT:    brasl %r14, bar3@PLT
35; CHECK-NEXT:    lmg %r14, %r15, 272(%r15)
36; CHECK-NEXT:    br %r14
37  call void @bar3 (<1 x i128> <i128 0>)
38  ret void
39}
40
41declare <1 x i128> @bar4()
42
43define void @f4(ptr %ptr) {
44; CHECK-LABEL: f4:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
47; CHECK-NEXT:    .cfi_offset %r13, -56
48; CHECK-NEXT:    .cfi_offset %r14, -48
49; CHECK-NEXT:    .cfi_offset %r15, -40
50; CHECK-NEXT:    aghi %r15, -160
51; CHECK-NEXT:    .cfi_def_cfa_offset 320
52; CHECK-NEXT:    lgr %r13, %r2
53; CHECK-NEXT:    brasl %r14, bar4@PLT
54; CHECK-NEXT:    vst %v24, 0(%r13), 3
55; CHECK-NEXT:    lmg %r13, %r15, 264(%r15)
56; CHECK-NEXT:    br %r14
57  %res = call <1 x i128> @bar4 ()
58  store <1 x i128> %res, ptr %ptr
59  ret void
60}
61
62define void @f5(<1 x fp128> %a, ptr %ptr) {
63; CHECK-LABEL: f5:
64; CHECK:       # %bb.0:
65; CHECK-NEXT:    vst %v24, 0(%r2), 3
66; CHECK-NEXT:    br %r14
67  store <1 x fp128> %a, ptr %ptr
68  ret void
69}
70
71define <1 x fp128> @f6() {
72; CHECK-LABEL: f6:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    lzxr %f0
75; CHECK-NEXT:    vmrhg %v24, %v0, %v2
76; CHECK-NEXT:    br %r14
77  ret <1 x fp128><fp128 0xL00000000000000000000000000000000>
78}
79
80declare void @bar7(<1 x fp128>)
81
82define void @f7() {
83; CHECK-LABEL: f7:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    stmg %r14, %r15, 112(%r15)
86; CHECK-NEXT:    .cfi_offset %r14, -48
87; CHECK-NEXT:    .cfi_offset %r15, -40
88; CHECK-NEXT:    aghi %r15, -160
89; CHECK-NEXT:    .cfi_def_cfa_offset 320
90; CHECK-NEXT:    lzxr %f0
91; CHECK-NEXT:    vmrhg %v24, %v0, %v2
92; CHECK-NEXT:    brasl %r14, bar7@PLT
93; CHECK-NEXT:    lmg %r14, %r15, 272(%r15)
94; CHECK-NEXT:    br %r14
95  call void @bar7 (<1 x fp128> <fp128 0xL00000000000000000000000000000000>)
96  ret void
97}
98
99declare <1 x fp128> @bar8()
100
101define void @f8(ptr %ptr) {
102; CHECK-LABEL: f8:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
105; CHECK-NEXT:    .cfi_offset %r13, -56
106; CHECK-NEXT:    .cfi_offset %r14, -48
107; CHECK-NEXT:    .cfi_offset %r15, -40
108; CHECK-NEXT:    aghi %r15, -160
109; CHECK-NEXT:    .cfi_def_cfa_offset 320
110; CHECK-NEXT:    lgr %r13, %r2
111; CHECK-NEXT:    brasl %r14, bar8@PLT
112; CHECK-NEXT:    vst %v24, 0(%r13), 3
113; CHECK-NEXT:    lmg %r13, %r15, 264(%r15)
114; CHECK-NEXT:    br %r14
115  %res = call <1 x fp128> @bar8 ()
116  store <1 x fp128> %res, ptr %ptr
117  ret void
118}
119
120