xref: /llvm-project/llvm/test/CodeGen/SystemZ/vec-args-03.ll (revision 0a76f7d9d8c1fc693568ed26420c47d92a6ba0e7)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Test the handling of incoming vector arguments.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5
6; This routine has 10 vector arguments, which fill up %v24-%v31 and
7; the two double-wide stack slots at 160 and 176.
8define <4 x i32> @foo(<4 x i32> %v1, <4 x i32> %v2, <4 x i32> %v3, <4 x i32> %v4,
9; CHECK-LABEL: foo:
10; CHECK:       # %bb.0:
11; CHECK-NEXT:    vl %v0, 176(%r15), 3
12; CHECK-NEXT:    vsf %v24, %v26, %v0
13; CHECK-NEXT:    br %r14
14                      <4 x i32> %v5, <4 x i32> %v6, <4 x i32> %v7, <4 x i32> %v8,
15                      <4 x i32> %v9, <4 x i32> %v10) {
16  %y = sub <4 x i32> %v2, %v10
17  ret <4 x i32> %y
18}
19
20; This routine has 10 vector arguments, which fill up %v24-%v31 and
21; the two single-wide stack slots at 160 and 168.
22define <4 x i8> @bar(<4 x i8> %v1, <4 x i8> %v2, <4 x i8> %v3, <4 x i8> %v4,
23; CHECK-LABEL: bar:
24; CHECK:       # %bb.0:
25; CHECK-NEXT:    vlrepg %v0, 168(%r15)
26; CHECK-NEXT:    vsb %v24, %v26, %v0
27; CHECK-NEXT:    br %r14
28                     <4 x i8> %v5, <4 x i8> %v6, <4 x i8> %v7, <4 x i8> %v8,
29                     <4 x i8> %v9, <4 x i8> %v10) {
30  %y = sub <4 x i8> %v2, %v10
31  ret <4 x i8> %y
32}
33
34