xref: /llvm-project/llvm/test/CodeGen/SystemZ/ucmp.ll (revision e094abde42634e38cda85a6024792f681fc58f32) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
3
4define i8 @ucmp.8.8(i8 zeroext %x, i8 zeroext %y) nounwind {
5; CHECK-LABEL: ucmp.8.8:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    cr %r2, %r3
8; CHECK-NEXT:    lhi %r2, 0
9; CHECK-NEXT:    lochih %r2, 1
10; CHECK-NEXT:    lochil %r2, -1
11; CHECK-NEXT:    br %r14
12  %1 = call i8 @llvm.ucmp(i8 %x, i8 %y)
13  ret i8 %1
14}
15
16define i8 @ucmp.8.16(i16 zeroext %x, i16 zeroext %y) nounwind {
17; CHECK-LABEL: ucmp.8.16:
18; CHECK:       # %bb.0:
19; CHECK-NEXT:    cr %r2, %r3
20; CHECK-NEXT:    lhi %r2, 0
21; CHECK-NEXT:    lochih %r2, 1
22; CHECK-NEXT:    lochil %r2, -1
23; CHECK-NEXT:    br %r14
24  %1 = call i8 @llvm.ucmp(i16 %x, i16 %y)
25  ret i8 %1
26}
27
28define i8 @ucmp.8.32(i32 %x, i32 %y) nounwind {
29; CHECK-LABEL: ucmp.8.32:
30; CHECK:       # %bb.0:
31; CHECK-NEXT:    clr %r2, %r3
32; CHECK-NEXT:    lhi %r2, 0
33; CHECK-NEXT:    lochih %r2, 1
34; CHECK-NEXT:    lochil %r2, -1
35; CHECK-NEXT:    br %r14
36  %1 = call i8 @llvm.ucmp(i32 %x, i32 %y)
37  ret i8 %1
38}
39
40define i8 @ucmp.8.64(i64 %x, i64 %y) nounwind {
41; CHECK-LABEL: ucmp.8.64:
42; CHECK:       # %bb.0:
43; CHECK-NEXT:    clgr %r2, %r3
44; CHECK-NEXT:    lhi %r2, 0
45; CHECK-NEXT:    lochih %r2, 1
46; CHECK-NEXT:    lochil %r2, -1
47; CHECK-NEXT:    br %r14
48  %1 = call i8 @llvm.ucmp(i64 %x, i64 %y)
49  ret i8 %1
50}
51
52define i8 @ucmp.8.128(i128 %x, i128 %y) nounwind {
53; CHECK-LABEL: ucmp.8.128:
54; CHECK:       # %bb.0:
55; CHECK-NEXT:    vl %v0, 0(%r3), 3
56; CHECK-NEXT:    vl %v1, 0(%r2), 3
57; CHECK-NEXT:    veclg %v0, %v1
58; CHECK-NEXT:    jlh .LBB4_2
59; CHECK-NEXT:  # %bb.1:
60; CHECK-NEXT:    vchlgs %v2, %v1, %v0
61; CHECK-NEXT:  .LBB4_2:
62; CHECK-NEXT:    lhi %r2, 0
63; CHECK-NEXT:    lochil %r2, 1
64; CHECK-NEXT:    veclg %v1, %v0
65; CHECK-NEXT:    jlh .LBB4_4
66; CHECK-NEXT:  # %bb.3:
67; CHECK-NEXT:    vchlgs %v0, %v0, %v1
68; CHECK-NEXT:  .LBB4_4:
69; CHECK-NEXT:    lochil %r2, -1
70; CHECK-NEXT:    br %r14
71  %1 = call i8 @llvm.ucmp(i128 %x, i128 %y)
72  ret i8 %1
73}
74
75define i32 @ucmp.32.32(i32 %x, i32 %y) nounwind {
76; CHECK-LABEL: ucmp.32.32:
77; CHECK:       # %bb.0:
78; CHECK-NEXT:    clr %r2, %r3
79; CHECK-NEXT:    lhi %r2, 0
80; CHECK-NEXT:    lochih %r2, 1
81; CHECK-NEXT:    lochil %r2, -1
82; CHECK-NEXT:    br %r14
83  %1 = call i32 @llvm.ucmp(i32 %x, i32 %y)
84  ret i32 %1
85}
86
87define i32 @ucmp.32.64(i64 %x, i64 %y) nounwind {
88; CHECK-LABEL: ucmp.32.64:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    clgr %r2, %r3
91; CHECK-NEXT:    lhi %r2, 0
92; CHECK-NEXT:    lochih %r2, 1
93; CHECK-NEXT:    lochil %r2, -1
94; CHECK-NEXT:    br %r14
95  %1 = call i32 @llvm.ucmp(i64 %x, i64 %y)
96  ret i32 %1
97}
98
99define i64 @ucmp.64.64(i64 %x, i64 %y) nounwind {
100; CHECK-LABEL: ucmp.64.64:
101; CHECK:       # %bb.0:
102; CHECK-NEXT:    clgr %r2, %r3
103; CHECK-NEXT:    lghi %r2, 0
104; CHECK-NEXT:    locghih %r2, 1
105; CHECK-NEXT:    locghil %r2, -1
106; CHECK-NEXT:    br %r14
107  %1 = call i64 @llvm.ucmp(i64 %x, i64 %y)
108  ret i64 %1
109}
110