1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; Test that 256-bit shifts still work when i128 is a legal type 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 5 6; Shift left. 7define i256 @f1(i256 %a, i256 %sh) { 8; CHECK-LABEL: f1: 9; CHECK: # %bb.0: 10; CHECK-NEXT: vl %v0, 0(%r3), 3 11; CHECK-NEXT: vl %v1, 16(%r3), 3 12; CHECK-NEXT: l %r0, 28(%r4) 13; CHECK-NEXT: clijhe %r0, 128, .LBB0_2 14; CHECK-NEXT: # %bb.1: 15; CHECK-NEXT: lhi %r1, 128 16; CHECK-NEXT: sr %r1, %r0 17; CHECK-NEXT: vlvgp %v2, %r1, %r1 18; CHECK-NEXT: vrepb %v2, %v2, 15 19; CHECK-NEXT: vsrlb %v3, %v1, %v2 20; CHECK-NEXT: vsrl %v2, %v3, %v2 21; CHECK-NEXT: vlvgp %v3, %r0, %r0 22; CHECK-NEXT: vrepb %v3, %v3, 15 23; CHECK-NEXT: vslb %v4, %v0, %v3 24; CHECK-NEXT: vslb %v1, %v1, %v3 25; CHECK-NEXT: vsl %v4, %v4, %v3 26; CHECK-NEXT: vo %v2, %v4, %v2 27; CHECK-NEXT: vsl %v1, %v1, %v3 28; CHECK-NEXT: cijlh %r0, 0, .LBB0_3 29; CHECK-NEXT: j .LBB0_4 30; CHECK-NEXT: .LBB0_2: 31; CHECK-NEXT: ahik %r1, %r0, -128 32; CHECK-NEXT: vlvgp %v2, %r1, %r1 33; CHECK-NEXT: vrepb %v2, %v2, 15 34; CHECK-NEXT: vslb %v1, %v1, %v2 35; CHECK-NEXT: vsl %v2, %v1, %v2 36; CHECK-NEXT: vgbm %v1, 0 37; CHECK-NEXT: cije %r0, 0, .LBB0_4 38; CHECK-NEXT: .LBB0_3: 39; CHECK-NEXT: vlr %v0, %v2 40; CHECK-NEXT: .LBB0_4: 41; CHECK-NEXT: vst %v1, 16(%r2), 3 42; CHECK-NEXT: vst %v0, 0(%r2), 3 43; CHECK-NEXT: br %r14 44 %res = shl i256 %a, %sh 45 ret i256 %res 46} 47 48; Shift right logical. 49define i256 @f2(i256 %a, i256 %sh) { 50; CHECK-LABEL: f2: 51; CHECK: # %bb.0: 52; CHECK-NEXT: vl %v0, 16(%r3), 3 53; CHECK-NEXT: vl %v1, 0(%r3), 3 54; CHECK-NEXT: l %r0, 28(%r4) 55; CHECK-NEXT: clijhe %r0, 128, .LBB1_2 56; CHECK-NEXT: # %bb.1: 57; CHECK-NEXT: lhi %r1, 128 58; CHECK-NEXT: sr %r1, %r0 59; CHECK-NEXT: vlvgp %v2, %r1, %r1 60; CHECK-NEXT: vrepb %v2, %v2, 15 61; CHECK-NEXT: vslb %v3, %v1, %v2 62; CHECK-NEXT: vsl %v2, %v3, %v2 63; CHECK-NEXT: vlvgp %v3, %r0, %r0 64; CHECK-NEXT: vrepb %v3, %v3, 15 65; CHECK-NEXT: vsrlb %v4, %v0, %v3 66; CHECK-NEXT: vsrlb %v1, %v1, %v3 67; CHECK-NEXT: vsrl %v4, %v4, %v3 68; CHECK-NEXT: vo %v2, %v4, %v2 69; CHECK-NEXT: vsrl %v1, %v1, %v3 70; CHECK-NEXT: cijlh %r0, 0, .LBB1_3 71; CHECK-NEXT: j .LBB1_4 72; CHECK-NEXT: .LBB1_2: 73; CHECK-NEXT: ahik %r1, %r0, -128 74; CHECK-NEXT: vlvgp %v2, %r1, %r1 75; CHECK-NEXT: vrepb %v2, %v2, 15 76; CHECK-NEXT: vsrlb %v1, %v1, %v2 77; CHECK-NEXT: vsrl %v2, %v1, %v2 78; CHECK-NEXT: vgbm %v1, 0 79; CHECK-NEXT: cije %r0, 0, .LBB1_4 80; CHECK-NEXT: .LBB1_3: 81; CHECK-NEXT: vlr %v0, %v2 82; CHECK-NEXT: .LBB1_4: 83; CHECK-NEXT: vst %v1, 0(%r2), 3 84; CHECK-NEXT: vst %v0, 16(%r2), 3 85; CHECK-NEXT: br %r14 86 %res = lshr i256 %a, %sh 87 ret i256 %res 88} 89 90; Shift right arithmetic. 91define i256 @f3(i256 %a, i256 %sh) { 92; CHECK-LABEL: f3: 93; CHECK: # %bb.0: 94; CHECK-NEXT: vl %v0, 16(%r3), 3 95; CHECK-NEXT: vl %v2, 0(%r3), 3 96; CHECK-NEXT: l %r0, 28(%r4) 97; CHECK-NEXT: clijhe %r0, 128, .LBB2_2 98; CHECK-NEXT: # %bb.1: 99; CHECK-NEXT: lhi %r1, 128 100; CHECK-NEXT: sr %r1, %r0 101; CHECK-NEXT: vlvgp %v1, %r0, %r0 102; CHECK-NEXT: vlvgp %v4, %r1, %r1 103; CHECK-NEXT: vrepb %v3, %v1, 15 104; CHECK-NEXT: vrepb %v4, %v4, 15 105; CHECK-NEXT: vsrab %v1, %v2, %v3 106; CHECK-NEXT: vslb %v2, %v2, %v4 107; CHECK-NEXT: vsl %v2, %v2, %v4 108; CHECK-NEXT: vsrlb %v4, %v0, %v3 109; CHECK-NEXT: vsra %v1, %v1, %v3 110; CHECK-NEXT: vsrl %v3, %v4, %v3 111; CHECK-NEXT: vo %v2, %v3, %v2 112; CHECK-NEXT: cijlh %r0, 0, .LBB2_3 113; CHECK-NEXT: j .LBB2_4 114; CHECK-NEXT: .LBB2_2: 115; CHECK-NEXT: vrepib %v1, 127 116; CHECK-NEXT: vsrab %v3, %v2, %v1 117; CHECK-NEXT: ahik %r1, %r0, -128 118; CHECK-NEXT: vsra %v1, %v3, %v1 119; CHECK-NEXT: vlvgp %v3, %r1, %r1 120; CHECK-NEXT: vrepb %v3, %v3, 15 121; CHECK-NEXT: vsrab %v2, %v2, %v3 122; CHECK-NEXT: vsra %v2, %v2, %v3 123; CHECK-NEXT: cije %r0, 0, .LBB2_4 124; CHECK-NEXT: .LBB2_3: 125; CHECK-NEXT: vlr %v0, %v2 126; CHECK-NEXT: .LBB2_4: 127; CHECK-NEXT: vst %v1, 0(%r2), 3 128; CHECK-NEXT: vst %v0, 16(%r2), 3 129; CHECK-NEXT: br %r14 130 %res = ashr i256 %a, %sh 131 ret i256 %res 132} 133