1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; Test removal of AND operations that don't affect last 6 bits of rotate amount 3; operand. 4; 5; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 6; RUN: llc < %s -mtriple=s390x-linux-gnu -early-live-intervals | FileCheck %s 7 8; Test that AND is not removed when some lower 5 bits are not set. 9define i32 @f1(i32 %val, i32 %amt) { 10; CHECK-LABEL: f1: 11; CHECK: # %bb.0: 12; CHECK-NEXT: nill %r3, 15 13; CHECK-NEXT: rll %r2, %r2, 0(%r3) 14; CHECK-NEXT: br %r14 15 %and = and i32 %amt, 15 16 17 %inv = sub i32 32, %and 18 %parta = shl i32 %val, %and 19 %partb = lshr i32 %val, %inv 20 21 %rotl = or i32 %parta, %partb 22 23 ret i32 %rotl 24} 25 26; Test removal of AND mask with only bottom 6 bits set. 27define i32 @f2(i32 %val, i32 %amt) { 28; CHECK-LABEL: f2: 29; CHECK: # %bb.0: 30; CHECK-NEXT: rll %r2, %r2, 0(%r3) 31; CHECK-NEXT: br %r14 32 %and = and i32 %amt, 63 33 34 %inv = sub i32 32, %and 35 %parta = shl i32 %val, %and 36 %partb = lshr i32 %val, %inv 37 38 %rotl = or i32 %parta, %partb 39 40 ret i32 %rotl 41} 42 43; Test removal of AND mask including but not limited to bottom 6 bits. 44define i32 @f3(i32 %val, i32 %amt) { 45; CHECK-LABEL: f3: 46; CHECK: # %bb.0: 47; CHECK-NEXT: rll %r2, %r2, 0(%r3) 48; CHECK-NEXT: br %r14 49 %and = and i32 %amt, 255 50 51 %inv = sub i32 32, %and 52 %parta = shl i32 %val, %and 53 %partb = lshr i32 %val, %inv 54 55 %rotl = or i32 %parta, %partb 56 57 ret i32 %rotl 58} 59 60; Test removal of AND mask from RLLG. 61define i64 @f4(i64 %val, i64 %amt) { 62; CHECK-LABEL: f4: 63; CHECK: # %bb.0: 64; CHECK-NEXT: rllg %r2, %r2, 0(%r3) 65; CHECK-NEXT: br %r14 66 %and = and i64 %amt, 63 67 68 %inv = sub i64 64, %and 69 %parta = shl i64 %val, %and 70 %partb = lshr i64 %val, %inv 71 72 %rotl = or i64 %parta, %partb 73 74 ret i64 %rotl 75} 76 77; Test that AND is not entirely removed if the result is reused. 78define i32 @f5(i32 %val, i32 %amt) { 79; CHECK-LABEL: f5: 80; CHECK: # %bb.0: 81; CHECK-NEXT: rll %r2, %r2, 0(%r3) 82; CHECK-NEXT: nilf %r3, 63 83; CHECK-NEXT: ar %r2, %r3 84; CHECK-NEXT: br %r14 85 %and = and i32 %amt, 63 86 87 %inv = sub i32 32, %and 88 %parta = shl i32 %val, %and 89 %partb = lshr i32 %val, %inv 90 91 %rotl = or i32 %parta, %partb 92 93 %reuse = add i32 %and, %rotl 94 ret i32 %reuse 95} 96