xref: /llvm-project/llvm/test/CodeGen/SystemZ/merge-stores.ll (revision 0037e21f28adbeb9f8cac30016521d543561645e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=s390x-linux-gnu -pre-RA-sched=list-ilp -disable-sched-live-uses=false | FileCheck %s
3
4target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-a:8:16-n32:64"
5
6%struct.a = type { i16, i32 }
7
8@e = dso_local global %struct.a { i16 9, i32 0 }, align 8
9@f = dso_local local_unnamed_addr global ptr @e, align 8
10@d = dso_local local_unnamed_addr global i32 0, align 4
11
12; This shows a miscompile caused by merging truncated
13; stores if the store of 0 (sthrl) to 'e' happens before
14; a 64-bit store (stg) of r0. The store of r0 can follow
15; the store to 'e' only if it is a 32-bit store (st).
16
17define signext i32 @main() {
18; CHECK-LABEL: main:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    lgrl %r0, e
21; CHECK-NEXT:    lgrl %r1, f
22; CHECK-NEXT:    srlg %r2, %r0, 32
23; CHECK-NEXT:    st %r2, 0(%r1)
24; CHECK-NEXT:    lhi %r2, 0
25; CHECK-NEXT:    sthrl %r2, e
26; CHECK-NEXT:    st %r0, 4(%r1)
27; CHECK-NEXT:    lghi %r2, 0
28; CHECK-NEXT:    strl %r0, d
29; CHECK-NEXT:    br %r14
30  %e = load i64, ptr @e, align 8
31  %esh = lshr i64 %e, 32
32  %ehi = trunc i64 %esh to i32
33  %elo = trunc i64 %e to i32
34  %t1 = load ptr, ptr @f, align 8
35  store i32 %ehi, ptr %t1, align 4
36  %f4 = getelementptr inbounds i8, ptr %t1, i64 4
37  store i32 %elo, ptr %f4, align 4
38  store i16 0, ptr @e, align 8
39  store i32 %elo, ptr @d, align 4
40  ret i32 0
41}
42