1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; Test the three-operand form of 64-bit addition. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 5 6declare i64 @foo(i64, i64, i64) 7 8; Check SLGRK. 9define i64 @f1(i64 %dummy, i64 %a, i64 %b, ptr %flag) { 10; CHECK-LABEL: f1: 11; CHECK: # %bb.0: 12; CHECK-NEXT: slgrk %r2, %r3, %r4 13; CHECK-NEXT: ipm %r0 14; CHECK-NEXT: afi %r0, -536870912 15; CHECK-NEXT: risbg %r0, %r0, 63, 191, 33 16; CHECK-NEXT: stg %r0, 0(%r5) 17; CHECK-NEXT: br %r14 18 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b) 19 %val = extractvalue {i64, i1} %t, 0 20 %obit = extractvalue {i64, i1} %t, 1 21 %ext = zext i1 %obit to i64 22 store i64 %ext, ptr %flag 23 ret i64 %val 24} 25 26; Check using the overflow result for a branch. 27define i64 @f2(i64 %dummy, i64 %a, i64 %b) { 28; CHECK-LABEL: f2: 29; CHECK: # %bb.0: 30; CHECK-NEXT: slgrk %r2, %r3, %r4 31; CHECK-NEXT: bnler %r14 32; CHECK-NEXT: .LBB1_1: # %call 33; CHECK-NEXT: lghi %r2, 0 34; CHECK-NEXT: jg foo@PLT 35 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b) 36 %val = extractvalue {i64, i1} %t, 0 37 %obit = extractvalue {i64, i1} %t, 1 38 br i1 %obit, label %call, label %exit 39 40call: 41 %res = tail call i64 @foo(i64 0, i64 %a, i64 %b) 42 ret i64 %res 43 44exit: 45 ret i64 %val 46} 47 48; ... and the same with the inverted direction. 49define i64 @f3(i64 %dummy, i64 %a, i64 %b) { 50; CHECK-LABEL: f3: 51; CHECK: # %bb.0: 52; CHECK-NEXT: slgrk %r2, %r3, %r4 53; CHECK-NEXT: bler %r14 54; CHECK-NEXT: .LBB2_1: # %call 55; CHECK-NEXT: lghi %r2, 0 56; CHECK-NEXT: jg foo@PLT 57 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b) 58 %val = extractvalue {i64, i1} %t, 0 59 %obit = extractvalue {i64, i1} %t, 1 60 br i1 %obit, label %exit, label %call 61 62call: 63 %res = tail call i64 @foo(i64 0, i64 %a, i64 %b) 64 ret i64 %res 65 66exit: 67 ret i64 %val 68} 69 70; Check that we can still use SLGR in obvious cases. 71define i64 @f4(i64 %a, i64 %b, ptr %flag) { 72; CHECK-LABEL: f4: 73; CHECK: # %bb.0: 74; CHECK-NEXT: slgr %r2, %r3 75; CHECK-NEXT: ipm %r0 76; CHECK-NEXT: afi %r0, -536870912 77; CHECK-NEXT: risbg %r0, %r0, 63, 191, 33 78; CHECK-NEXT: stg %r0, 0(%r4) 79; CHECK-NEXT: br %r14 80 %t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %a, i64 %b) 81 %val = extractvalue {i64, i1} %t, 0 82 %obit = extractvalue {i64, i1} %t, 1 83 %ext = zext i1 %obit to i64 84 store i64 %ext, ptr %flag 85 ret i64 %val 86} 87 88declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone 89 90