xref: /llvm-project/llvm/test/CodeGen/SystemZ/int-usub-06.ll (revision 872276de4b8c5f13f106b79c53a27e4a6ff8ce35)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2; Test the three-operand form of 32-bit subtraction.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
5
6declare i32 @foo(i32, i32, i32)
7
8; Check SLRK.
9define i32 @f1(i32 %dummy, i32 %a, i32 %b, ptr %flag) {
10; CHECK-LABEL: f1:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    slrk %r2, %r3, %r4
13; CHECK-NEXT:    ipm %r0
14; CHECK-NEXT:    afi %r0, -536870912
15; CHECK-NEXT:    srl %r0, 31
16; CHECK-NEXT:    st %r0, 0(%r5)
17; CHECK-NEXT:    br %r14
18  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
19  %val = extractvalue {i32, i1} %t, 0
20  %obit = extractvalue {i32, i1} %t, 1
21  %ext = zext i1 %obit to i32
22  store i32 %ext, ptr %flag
23  ret i32 %val
24}
25
26; Check using the overflow result for a branch.
27define i32 @f2(i32 %dummy, i32 %a, i32 %b) {
28; CHECK-LABEL: f2:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    slrk %r2, %r3, %r4
31; CHECK-NEXT:    bnler %r14
32; CHECK-NEXT:  .LBB1_1: # %call
33; CHECK-NEXT:    lhi %r2, 0
34; CHECK-NEXT:    jg foo@PLT
35  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
36  %val = extractvalue {i32, i1} %t, 0
37  %obit = extractvalue {i32, i1} %t, 1
38  br i1 %obit, label %call, label %exit
39
40call:
41  %res = tail call i32 @foo(i32 0, i32 %a, i32 %b)
42  ret i32 %res
43
44exit:
45  ret i32 %val
46}
47
48; ... and the same with the inverted direction.
49define i32 @f3(i32 %dummy, i32 %a, i32 %b) {
50; CHECK-LABEL: f3:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    slrk %r2, %r3, %r4
53; CHECK-NEXT:    bler %r14
54; CHECK-NEXT:  .LBB2_1: # %call
55; CHECK-NEXT:    lhi %r2, 0
56; CHECK-NEXT:    jg foo@PLT
57  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
58  %val = extractvalue {i32, i1} %t, 0
59  %obit = extractvalue {i32, i1} %t, 1
60  br i1 %obit, label %exit, label %call
61
62call:
63  %res = tail call i32 @foo(i32 0, i32 %a, i32 %b)
64  ret i32 %res
65
66exit:
67  ret i32 %val
68}
69
70; Check that we can still use SLR in obvious cases.
71define i32 @f4(i32 %a, i32 %b, ptr %flag) {
72; CHECK-LABEL: f4:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    slr %r2, %r3
75; CHECK-NEXT:    ipm %r0
76; CHECK-NEXT:    afi %r0, -536870912
77; CHECK-NEXT:    srl %r0, 31
78; CHECK-NEXT:    st %r0, 0(%r4)
79; CHECK-NEXT:    br %r14
80  %t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
81  %val = extractvalue {i32, i1} %t, 0
82  %obit = extractvalue {i32, i1} %t, 1
83  %ext = zext i1 %obit to i32
84  store i32 %ext, ptr %flag
85  ret i32 %val
86}
87
88declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
89
90