1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; Test the three-operand form of 32-bit addition. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 5 6declare i32 @foo(i32, i32, i32) 7 8; Check ALRK. 9define i32 @f1(i32 %dummy, i32 %a, i32 %b, ptr %flag) { 10; CHECK-LABEL: f1: 11; CHECK: # %bb.0: 12; CHECK-NEXT: alrk %r2, %r3, %r4 13; CHECK-NEXT: ipm %r0 14; CHECK-NEXT: risblg %r0, %r0, 31, 159, 35 15; CHECK-NEXT: st %r0, 0(%r5) 16; CHECK-NEXT: br %r14 17 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) 18 %val = extractvalue {i32, i1} %t, 0 19 %obit = extractvalue {i32, i1} %t, 1 20 %ext = zext i1 %obit to i32 21 store i32 %ext, ptr %flag 22 ret i32 %val 23} 24 25; Check using the overflow result for a branch. 26define i32 @f2(i32 %dummy, i32 %a, i32 %b) { 27; CHECK-LABEL: f2: 28; CHECK: # %bb.0: 29; CHECK-NEXT: alrk %r2, %r3, %r4 30; CHECK-NEXT: bler %r14 31; CHECK-NEXT: .LBB1_1: # %call 32; CHECK-NEXT: lhi %r2, 0 33; CHECK-NEXT: jg foo@PLT 34 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) 35 %val = extractvalue {i32, i1} %t, 0 36 %obit = extractvalue {i32, i1} %t, 1 37 br i1 %obit, label %call, label %exit 38 39call: 40 %res = tail call i32 @foo(i32 0, i32 %a, i32 %b) 41 ret i32 %res 42 43exit: 44 ret i32 %val 45} 46 47; ... and the same with the inverted direction. 48define i32 @f3(i32 %dummy, i32 %a, i32 %b) { 49; CHECK-LABEL: f3: 50; CHECK: # %bb.0: 51; CHECK-NEXT: alrk %r2, %r3, %r4 52; CHECK-NEXT: bnler %r14 53; CHECK-NEXT: .LBB2_1: # %call 54; CHECK-NEXT: lhi %r2, 0 55; CHECK-NEXT: jg foo@PLT 56 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) 57 %val = extractvalue {i32, i1} %t, 0 58 %obit = extractvalue {i32, i1} %t, 1 59 br i1 %obit, label %exit, label %call 60 61call: 62 %res = tail call i32 @foo(i32 0, i32 %a, i32 %b) 63 ret i32 %res 64 65exit: 66 ret i32 %val 67} 68 69; Check that we can still use ALR in obvious cases. 70define i32 @f4(i32 %a, i32 %b, ptr %flag) { 71; CHECK-LABEL: f4: 72; CHECK: # %bb.0: 73; CHECK-NEXT: alr %r2, %r3 74; CHECK-NEXT: ipm %r0 75; CHECK-NEXT: risblg %r0, %r0, 31, 159, 35 76; CHECK-NEXT: st %r0, 0(%r4) 77; CHECK-NEXT: br %r14 78 %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 %b) 79 %val = extractvalue {i32, i1} %t, 0 80 %obit = extractvalue {i32, i1} %t, 1 81 %ext = zext i1 %obit to i32 82 store i32 %ext, ptr %flag 83 ret i32 %val 84} 85 86declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone 87 88