xref: /llvm-project/llvm/test/CodeGen/SystemZ/int-sub-12.ll (revision 8424bf207efd89eacf2fe893b67be98d535e1db6)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Test 128-bit subtraction in vector registers on z13 and later
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch15 | FileCheck %s
6
7define i128 @f1(i128 %a, i128 %b) {
8; CHECK-LABEL: f1:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vl %v0, 0(%r4), 3
11; CHECK-NEXT:    vl %v1, 0(%r3), 3
12; CHECK-NEXT:    vsq %v0, %v1, %v0
13; CHECK-NEXT:    vst %v0, 0(%r2), 3
14; CHECK-NEXT:    br %r14
15  %res = sub i128 %a, %b
16  ret i128 %res
17}
18