1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; Test i128 minimum on z13. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 5 6; Test with slt. 7define i128 @f1(i128 %val1, i128 %val2) { 8; CHECK-LABEL: f1: 9; CHECK: # %bb.0: 10; CHECK-NEXT: vl %v0, 0(%r4), 3 11; CHECK-NEXT: vl %v1, 0(%r3), 3 12; CHECK-NEXT: vecg %v0, %v1 13; CHECK-NEXT: je .LBB0_3 14; CHECK-NEXT: # %bb.1: 15; CHECK-NEXT: jnl .LBB0_4 16; CHECK-NEXT: .LBB0_2: 17; CHECK-NEXT: vst %v0, 0(%r2), 3 18; CHECK-NEXT: br %r14 19; CHECK-NEXT: .LBB0_3: 20; CHECK-NEXT: vchlgs %v2, %v1, %v0 21; CHECK-NEXT: jl .LBB0_2 22; CHECK-NEXT: .LBB0_4: 23; CHECK-NEXT: vlr %v0, %v1 24; CHECK-NEXT: vst %v0, 0(%r2), 3 25; CHECK-NEXT: br %r14 26 %cmp = icmp slt i128 %val2, %val1 27 %ret = select i1 %cmp, i128 %val2, i128 %val1 28 ret i128 %ret 29} 30 31; Test with sle. 32define i128 @f2(i128 %val1, i128 %val2) { 33; CHECK-LABEL: f2: 34; CHECK: # %bb.0: 35; CHECK-NEXT: vl %v1, 0(%r3), 3 36; CHECK-NEXT: vl %v0, 0(%r4), 3 37; CHECK-NEXT: vecg %v1, %v0 38; CHECK-NEXT: je .LBB1_3 39; CHECK-NEXT: # %bb.1: 40; CHECK-NEXT: jl .LBB1_4 41; CHECK-NEXT: .LBB1_2: 42; CHECK-NEXT: vst %v0, 0(%r2), 3 43; CHECK-NEXT: br %r14 44; CHECK-NEXT: .LBB1_3: 45; CHECK-NEXT: vchlgs %v2, %v0, %v1 46; CHECK-NEXT: jnl .LBB1_2 47; CHECK-NEXT: .LBB1_4: 48; CHECK-NEXT: vlr %v0, %v1 49; CHECK-NEXT: vst %v0, 0(%r2), 3 50; CHECK-NEXT: br %r14 51 %cmp = icmp sle i128 %val2, %val1 52 %ret = select i1 %cmp, i128 %val2, i128 %val1 53 ret i128 %ret 54} 55 56; Test with sgt. 57define i128 @f3(i128 %val1, i128 %val2) { 58; CHECK-LABEL: f3: 59; CHECK: # %bb.0: 60; CHECK-NEXT: vl %v0, 0(%r3), 3 61; CHECK-NEXT: vl %v1, 0(%r4), 3 62; CHECK-NEXT: vecg %v0, %v1 63; CHECK-NEXT: je .LBB2_3 64; CHECK-NEXT: # %bb.1: 65; CHECK-NEXT: jnl .LBB2_4 66; CHECK-NEXT: .LBB2_2: 67; CHECK-NEXT: vst %v0, 0(%r2), 3 68; CHECK-NEXT: br %r14 69; CHECK-NEXT: .LBB2_3: 70; CHECK-NEXT: vchlgs %v2, %v1, %v0 71; CHECK-NEXT: jl .LBB2_2 72; CHECK-NEXT: .LBB2_4: 73; CHECK-NEXT: vlr %v0, %v1 74; CHECK-NEXT: vst %v0, 0(%r2), 3 75; CHECK-NEXT: br %r14 76 %cmp = icmp sgt i128 %val2, %val1 77 %ret = select i1 %cmp, i128 %val1, i128 %val2 78 ret i128 %ret 79} 80 81; Test with sge. 82define i128 @f4(i128 %val1, i128 %val2) { 83; CHECK-LABEL: f4: 84; CHECK: # %bb.0: 85; CHECK-NEXT: vl %v1, 0(%r4), 3 86; CHECK-NEXT: vl %v0, 0(%r3), 3 87; CHECK-NEXT: vecg %v1, %v0 88; CHECK-NEXT: je .LBB3_3 89; CHECK-NEXT: # %bb.1: 90; CHECK-NEXT: jl .LBB3_4 91; CHECK-NEXT: .LBB3_2: 92; CHECK-NEXT: vst %v0, 0(%r2), 3 93; CHECK-NEXT: br %r14 94; CHECK-NEXT: .LBB3_3: 95; CHECK-NEXT: vchlgs %v2, %v0, %v1 96; CHECK-NEXT: jnl .LBB3_2 97; CHECK-NEXT: .LBB3_4: 98; CHECK-NEXT: vlr %v0, %v1 99; CHECK-NEXT: vst %v0, 0(%r2), 3 100; CHECK-NEXT: br %r14 101 %cmp = icmp sge i128 %val2, %val1 102 %ret = select i1 %cmp, i128 %val1, i128 %val2 103 ret i128 %ret 104} 105 106; Test with ult. 107define i128 @f5(i128 %val1, i128 %val2) { 108; CHECK-LABEL: f5: 109; CHECK: # %bb.0: 110; CHECK-NEXT: vl %v0, 0(%r4), 3 111; CHECK-NEXT: vl %v1, 0(%r3), 3 112; CHECK-NEXT: veclg %v0, %v1 113; CHECK-NEXT: je .LBB4_3 114; CHECK-NEXT: # %bb.1: 115; CHECK-NEXT: jnl .LBB4_4 116; CHECK-NEXT: .LBB4_2: 117; CHECK-NEXT: vst %v0, 0(%r2), 3 118; CHECK-NEXT: br %r14 119; CHECK-NEXT: .LBB4_3: 120; CHECK-NEXT: vchlgs %v2, %v1, %v0 121; CHECK-NEXT: jl .LBB4_2 122; CHECK-NEXT: .LBB4_4: 123; CHECK-NEXT: vlr %v0, %v1 124; CHECK-NEXT: vst %v0, 0(%r2), 3 125; CHECK-NEXT: br %r14 126 %cmp = icmp ult i128 %val2, %val1 127 %ret = select i1 %cmp, i128 %val2, i128 %val1 128 ret i128 %ret 129} 130 131; Test with ule. 132define i128 @f6(i128 %val1, i128 %val2) { 133; CHECK-LABEL: f6: 134; CHECK: # %bb.0: 135; CHECK-NEXT: vl %v1, 0(%r3), 3 136; CHECK-NEXT: vl %v0, 0(%r4), 3 137; CHECK-NEXT: veclg %v1, %v0 138; CHECK-NEXT: je .LBB5_3 139; CHECK-NEXT: # %bb.1: 140; CHECK-NEXT: jl .LBB5_4 141; CHECK-NEXT: .LBB5_2: 142; CHECK-NEXT: vst %v0, 0(%r2), 3 143; CHECK-NEXT: br %r14 144; CHECK-NEXT: .LBB5_3: 145; CHECK-NEXT: vchlgs %v2, %v0, %v1 146; CHECK-NEXT: jnl .LBB5_2 147; CHECK-NEXT: .LBB5_4: 148; CHECK-NEXT: vlr %v0, %v1 149; CHECK-NEXT: vst %v0, 0(%r2), 3 150; CHECK-NEXT: br %r14 151 %cmp = icmp ule i128 %val2, %val1 152 %ret = select i1 %cmp, i128 %val2, i128 %val1 153 ret i128 %ret 154} 155 156; Test with ugt. 157define i128 @f7(i128 %val1, i128 %val2) { 158; CHECK-LABEL: f7: 159; CHECK: # %bb.0: 160; CHECK-NEXT: vl %v0, 0(%r3), 3 161; CHECK-NEXT: vl %v1, 0(%r4), 3 162; CHECK-NEXT: veclg %v0, %v1 163; CHECK-NEXT: je .LBB6_3 164; CHECK-NEXT: # %bb.1: 165; CHECK-NEXT: jnl .LBB6_4 166; CHECK-NEXT: .LBB6_2: 167; CHECK-NEXT: vst %v0, 0(%r2), 3 168; CHECK-NEXT: br %r14 169; CHECK-NEXT: .LBB6_3: 170; CHECK-NEXT: vchlgs %v2, %v1, %v0 171; CHECK-NEXT: jl .LBB6_2 172; CHECK-NEXT: .LBB6_4: 173; CHECK-NEXT: vlr %v0, %v1 174; CHECK-NEXT: vst %v0, 0(%r2), 3 175; CHECK-NEXT: br %r14 176 %cmp = icmp ugt i128 %val2, %val1 177 %ret = select i1 %cmp, i128 %val1, i128 %val2 178 ret i128 %ret 179} 180 181; Test with uge. 182define i128 @f8(i128 %val1, i128 %val2) { 183; CHECK-LABEL: f8: 184; CHECK: # %bb.0: 185; CHECK-NEXT: vl %v1, 0(%r4), 3 186; CHECK-NEXT: vl %v0, 0(%r3), 3 187; CHECK-NEXT: veclg %v1, %v0 188; CHECK-NEXT: je .LBB7_3 189; CHECK-NEXT: # %bb.1: 190; CHECK-NEXT: jl .LBB7_4 191; CHECK-NEXT: .LBB7_2: 192; CHECK-NEXT: vst %v0, 0(%r2), 3 193; CHECK-NEXT: br %r14 194; CHECK-NEXT: .LBB7_3: 195; CHECK-NEXT: vchlgs %v2, %v0, %v1 196; CHECK-NEXT: jnl .LBB7_2 197; CHECK-NEXT: .LBB7_4: 198; CHECK-NEXT: vlr %v0, %v1 199; CHECK-NEXT: vst %v0, 0(%r2), 3 200; CHECK-NEXT: br %r14 201 %cmp = icmp uge i128 %val2, %val1 202 %ret = select i1 %cmp, i128 %val1, i128 %val2 203 ret i128 %ret 204} 205