xref: /llvm-project/llvm/test/CodeGen/SystemZ/int-max-02.ll (revision 8424bf207efd89eacf2fe893b67be98d535e1db6) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Test i128 maximum on arch15.
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch15 | FileCheck %s
5
6; Test with slt.
7define i128 @f1(i128 %val1, i128 %val2) {
8; CHECK-LABEL: f1:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vl %v0, 0(%r3), 3
11; CHECK-NEXT:    vl %v1, 0(%r4), 3
12; CHECK-NEXT:    vmxq %v0, %v1, %v0
13; CHECK-NEXT:    vst %v0, 0(%r2), 3
14; CHECK-NEXT:    br %r14
15  %cmp = icmp slt i128 %val1, %val2
16  %ret = select i1 %cmp, i128 %val2, i128 %val1
17  ret i128 %ret
18}
19
20; Test with sle.
21define i128 @f2(i128 %val1, i128 %val2) {
22; CHECK-LABEL: f2:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    vl %v0, 0(%r4), 3
25; CHECK-NEXT:    vl %v1, 0(%r3), 3
26; CHECK-NEXT:    vmxq %v0, %v1, %v0
27; CHECK-NEXT:    vst %v0, 0(%r2), 3
28; CHECK-NEXT:    br %r14
29  %cmp = icmp sle i128 %val1, %val2
30  %ret = select i1 %cmp, i128 %val2, i128 %val1
31  ret i128 %ret
32}
33
34; Test with sgt.
35define i128 @f3(i128 %val1, i128 %val2) {
36; CHECK-LABEL: f3:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    vl %v0, 0(%r4), 3
39; CHECK-NEXT:    vl %v1, 0(%r3), 3
40; CHECK-NEXT:    vmxq %v0, %v1, %v0
41; CHECK-NEXT:    vst %v0, 0(%r2), 3
42; CHECK-NEXT:    br %r14
43  %cmp = icmp sgt i128 %val1, %val2
44  %ret = select i1 %cmp, i128 %val1, i128 %val2
45  ret i128 %ret
46}
47
48; Test with sge.
49define i128 @f4(i128 %val1, i128 %val2) {
50; CHECK-LABEL: f4:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    vl %v0, 0(%r3), 3
53; CHECK-NEXT:    vl %v1, 0(%r4), 3
54; CHECK-NEXT:    vmxq %v0, %v1, %v0
55; CHECK-NEXT:    vst %v0, 0(%r2), 3
56; CHECK-NEXT:    br %r14
57  %cmp = icmp sge i128 %val1, %val2
58  %ret = select i1 %cmp, i128 %val1, i128 %val2
59  ret i128 %ret
60}
61
62; Test with ult.
63define i128 @f5(i128 %val1, i128 %val2) {
64; CHECK-LABEL: f5:
65; CHECK:       # %bb.0:
66; CHECK-NEXT:    vl %v0, 0(%r3), 3
67; CHECK-NEXT:    vl %v1, 0(%r4), 3
68; CHECK-NEXT:    vmxlq %v0, %v1, %v0
69; CHECK-NEXT:    vst %v0, 0(%r2), 3
70; CHECK-NEXT:    br %r14
71  %cmp = icmp ult i128 %val1, %val2
72  %ret = select i1 %cmp, i128 %val2, i128 %val1
73  ret i128 %ret
74}
75
76; Test with ule.
77define i128 @f6(i128 %val1, i128 %val2) {
78; CHECK-LABEL: f6:
79; CHECK:       # %bb.0:
80; CHECK-NEXT:    vl %v0, 0(%r4), 3
81; CHECK-NEXT:    vl %v1, 0(%r3), 3
82; CHECK-NEXT:    vmxlq %v0, %v1, %v0
83; CHECK-NEXT:    vst %v0, 0(%r2), 3
84; CHECK-NEXT:    br %r14
85  %cmp = icmp ule i128 %val1, %val2
86  %ret = select i1 %cmp, i128 %val2, i128 %val1
87  ret i128 %ret
88}
89
90; Test with ugt.
91define i128 @f7(i128 %val1, i128 %val2) {
92; CHECK-LABEL: f7:
93; CHECK:       # %bb.0:
94; CHECK-NEXT:    vl %v0, 0(%r4), 3
95; CHECK-NEXT:    vl %v1, 0(%r3), 3
96; CHECK-NEXT:    vmxlq %v0, %v1, %v0
97; CHECK-NEXT:    vst %v0, 0(%r2), 3
98; CHECK-NEXT:    br %r14
99  %cmp = icmp ugt i128 %val1, %val2
100  %ret = select i1 %cmp, i128 %val1, i128 %val2
101  ret i128 %ret
102}
103
104; Test with uge.
105define i128 @f8(i128 %val1, i128 %val2) {
106; CHECK-LABEL: f8:
107; CHECK:       # %bb.0:
108; CHECK-NEXT:    vl %v0, 0(%r3), 3
109; CHECK-NEXT:    vl %v1, 0(%r4), 3
110; CHECK-NEXT:    vmxlq %v0, %v1, %v0
111; CHECK-NEXT:    vst %v0, 0(%r2), 3
112; CHECK-NEXT:    br %r14
113  %cmp = icmp uge i128 %val1, %val2
114  %ret = select i1 %cmp, i128 %val1, i128 %val2
115  ret i128 %ret
116}
117