xref: /llvm-project/llvm/test/CodeGen/SystemZ/int-div-07.ll (revision a65ccc1b9fe740c9f65d9cf2b627de50278aad56)
1*a65ccc1bSUlrich Weigand; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2*a65ccc1bSUlrich Weigand; Test 128-bit division and remainder in vector registers on z13 using libcalls
3*a65ccc1bSUlrich Weigand;
4*a65ccc1bSUlrich Weigand; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5*a65ccc1bSUlrich Weigand
6*a65ccc1bSUlrich Weigand; Divide signed.
7*a65ccc1bSUlrich Weiganddefine i128 @f1(i128 %a, i128 %b) {
8*a65ccc1bSUlrich Weigand; CHECK-LABEL: f1:
9*a65ccc1bSUlrich Weigand; CHECK:       # %bb.0:
10*a65ccc1bSUlrich Weigand; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
11*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r13, -56
12*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r14, -48
13*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r15, -40
14*a65ccc1bSUlrich Weigand; CHECK-NEXT:    aghi %r15, -208
15*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_def_cfa_offset 368
16*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 0(%r3), 3
17*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v1, 0(%r4), 3
18*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lgr %r13, %r2
19*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r2, 192(%r15)
20*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r3, 176(%r15)
21*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r4, 160(%r15)
22*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v1, 160(%r15), 3
23*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 176(%r15), 3
24*a65ccc1bSUlrich Weigand; CHECK-NEXT:    brasl %r14, __divti3@PLT
25*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 192(%r15), 3
26*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 0(%r13), 3
27*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
28*a65ccc1bSUlrich Weigand; CHECK-NEXT:    br %r14
29*a65ccc1bSUlrich Weigand  %res = sdiv i128 %a, %b
30*a65ccc1bSUlrich Weigand  ret i128 %res
31*a65ccc1bSUlrich Weigand}
32*a65ccc1bSUlrich Weigand
33*a65ccc1bSUlrich Weigand; Divide unsigned.
34*a65ccc1bSUlrich Weiganddefine i128 @f2(i128 %a, i128 %b) {
35*a65ccc1bSUlrich Weigand; CHECK-LABEL: f2:
36*a65ccc1bSUlrich Weigand; CHECK:       # %bb.0:
37*a65ccc1bSUlrich Weigand; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
38*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r13, -56
39*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r14, -48
40*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r15, -40
41*a65ccc1bSUlrich Weigand; CHECK-NEXT:    aghi %r15, -208
42*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_def_cfa_offset 368
43*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 0(%r3), 3
44*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v1, 0(%r4), 3
45*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lgr %r13, %r2
46*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r2, 192(%r15)
47*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r3, 176(%r15)
48*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r4, 160(%r15)
49*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v1, 160(%r15), 3
50*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 176(%r15), 3
51*a65ccc1bSUlrich Weigand; CHECK-NEXT:    brasl %r14, __udivti3@PLT
52*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 192(%r15), 3
53*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 0(%r13), 3
54*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
55*a65ccc1bSUlrich Weigand; CHECK-NEXT:    br %r14
56*a65ccc1bSUlrich Weigand  %res = udiv i128 %a, %b
57*a65ccc1bSUlrich Weigand  ret i128 %res
58*a65ccc1bSUlrich Weigand}
59*a65ccc1bSUlrich Weigand
60*a65ccc1bSUlrich Weigand; Remainder signed.
61*a65ccc1bSUlrich Weiganddefine i128 @f3(i128 %a, i128 %b) {
62*a65ccc1bSUlrich Weigand; CHECK-LABEL: f3:
63*a65ccc1bSUlrich Weigand; CHECK:       # %bb.0:
64*a65ccc1bSUlrich Weigand; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
65*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r13, -56
66*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r14, -48
67*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r15, -40
68*a65ccc1bSUlrich Weigand; CHECK-NEXT:    aghi %r15, -208
69*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_def_cfa_offset 368
70*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 0(%r3), 3
71*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v1, 0(%r4), 3
72*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lgr %r13, %r2
73*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r2, 192(%r15)
74*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r3, 176(%r15)
75*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r4, 160(%r15)
76*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v1, 160(%r15), 3
77*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 176(%r15), 3
78*a65ccc1bSUlrich Weigand; CHECK-NEXT:    brasl %r14, __modti3@PLT
79*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 192(%r15), 3
80*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 0(%r13), 3
81*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
82*a65ccc1bSUlrich Weigand; CHECK-NEXT:    br %r14
83*a65ccc1bSUlrich Weigand  %res = srem i128 %a, %b
84*a65ccc1bSUlrich Weigand  ret i128 %res
85*a65ccc1bSUlrich Weigand}
86*a65ccc1bSUlrich Weigand
87*a65ccc1bSUlrich Weigand; Remainder unsigned.
88*a65ccc1bSUlrich Weiganddefine i128 @f4(i128 %a, i128 %b) {
89*a65ccc1bSUlrich Weigand; CHECK-LABEL: f4:
90*a65ccc1bSUlrich Weigand; CHECK:       # %bb.0:
91*a65ccc1bSUlrich Weigand; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
92*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r13, -56
93*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r14, -48
94*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_offset %r15, -40
95*a65ccc1bSUlrich Weigand; CHECK-NEXT:    aghi %r15, -208
96*a65ccc1bSUlrich Weigand; CHECK-NEXT:    .cfi_def_cfa_offset 368
97*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 0(%r3), 3
98*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v1, 0(%r4), 3
99*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lgr %r13, %r2
100*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r2, 192(%r15)
101*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r3, 176(%r15)
102*a65ccc1bSUlrich Weigand; CHECK-NEXT:    la %r4, 160(%r15)
103*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v1, 160(%r15), 3
104*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 176(%r15), 3
105*a65ccc1bSUlrich Weigand; CHECK-NEXT:    brasl %r14, __umodti3@PLT
106*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vl %v0, 192(%r15), 3
107*a65ccc1bSUlrich Weigand; CHECK-NEXT:    vst %v0, 0(%r13), 3
108*a65ccc1bSUlrich Weigand; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
109*a65ccc1bSUlrich Weigand; CHECK-NEXT:    br %r14
110*a65ccc1bSUlrich Weigand  %res = urem i128 %a, %b
111*a65ccc1bSUlrich Weigand  ret i128 %res
112*a65ccc1bSUlrich Weigand}
113