xref: /llvm-project/llvm/test/CodeGen/SystemZ/int-div-07.ll (revision a65ccc1b9fe740c9f65d9cf2b627de50278aad56)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; Test 128-bit division and remainder in vector registers on z13 using libcalls
3;
4; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
5
6; Divide signed.
7define i128 @f1(i128 %a, i128 %b) {
8; CHECK-LABEL: f1:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
11; CHECK-NEXT:    .cfi_offset %r13, -56
12; CHECK-NEXT:    .cfi_offset %r14, -48
13; CHECK-NEXT:    .cfi_offset %r15, -40
14; CHECK-NEXT:    aghi %r15, -208
15; CHECK-NEXT:    .cfi_def_cfa_offset 368
16; CHECK-NEXT:    vl %v0, 0(%r3), 3
17; CHECK-NEXT:    vl %v1, 0(%r4), 3
18; CHECK-NEXT:    lgr %r13, %r2
19; CHECK-NEXT:    la %r2, 192(%r15)
20; CHECK-NEXT:    la %r3, 176(%r15)
21; CHECK-NEXT:    la %r4, 160(%r15)
22; CHECK-NEXT:    vst %v1, 160(%r15), 3
23; CHECK-NEXT:    vst %v0, 176(%r15), 3
24; CHECK-NEXT:    brasl %r14, __divti3@PLT
25; CHECK-NEXT:    vl %v0, 192(%r15), 3
26; CHECK-NEXT:    vst %v0, 0(%r13), 3
27; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
28; CHECK-NEXT:    br %r14
29  %res = sdiv i128 %a, %b
30  ret i128 %res
31}
32
33; Divide unsigned.
34define i128 @f2(i128 %a, i128 %b) {
35; CHECK-LABEL: f2:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
38; CHECK-NEXT:    .cfi_offset %r13, -56
39; CHECK-NEXT:    .cfi_offset %r14, -48
40; CHECK-NEXT:    .cfi_offset %r15, -40
41; CHECK-NEXT:    aghi %r15, -208
42; CHECK-NEXT:    .cfi_def_cfa_offset 368
43; CHECK-NEXT:    vl %v0, 0(%r3), 3
44; CHECK-NEXT:    vl %v1, 0(%r4), 3
45; CHECK-NEXT:    lgr %r13, %r2
46; CHECK-NEXT:    la %r2, 192(%r15)
47; CHECK-NEXT:    la %r3, 176(%r15)
48; CHECK-NEXT:    la %r4, 160(%r15)
49; CHECK-NEXT:    vst %v1, 160(%r15), 3
50; CHECK-NEXT:    vst %v0, 176(%r15), 3
51; CHECK-NEXT:    brasl %r14, __udivti3@PLT
52; CHECK-NEXT:    vl %v0, 192(%r15), 3
53; CHECK-NEXT:    vst %v0, 0(%r13), 3
54; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
55; CHECK-NEXT:    br %r14
56  %res = udiv i128 %a, %b
57  ret i128 %res
58}
59
60; Remainder signed.
61define i128 @f3(i128 %a, i128 %b) {
62; CHECK-LABEL: f3:
63; CHECK:       # %bb.0:
64; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
65; CHECK-NEXT:    .cfi_offset %r13, -56
66; CHECK-NEXT:    .cfi_offset %r14, -48
67; CHECK-NEXT:    .cfi_offset %r15, -40
68; CHECK-NEXT:    aghi %r15, -208
69; CHECK-NEXT:    .cfi_def_cfa_offset 368
70; CHECK-NEXT:    vl %v0, 0(%r3), 3
71; CHECK-NEXT:    vl %v1, 0(%r4), 3
72; CHECK-NEXT:    lgr %r13, %r2
73; CHECK-NEXT:    la %r2, 192(%r15)
74; CHECK-NEXT:    la %r3, 176(%r15)
75; CHECK-NEXT:    la %r4, 160(%r15)
76; CHECK-NEXT:    vst %v1, 160(%r15), 3
77; CHECK-NEXT:    vst %v0, 176(%r15), 3
78; CHECK-NEXT:    brasl %r14, __modti3@PLT
79; CHECK-NEXT:    vl %v0, 192(%r15), 3
80; CHECK-NEXT:    vst %v0, 0(%r13), 3
81; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
82; CHECK-NEXT:    br %r14
83  %res = srem i128 %a, %b
84  ret i128 %res
85}
86
87; Remainder unsigned.
88define i128 @f4(i128 %a, i128 %b) {
89; CHECK-LABEL: f4:
90; CHECK:       # %bb.0:
91; CHECK-NEXT:    stmg %r13, %r15, 104(%r15)
92; CHECK-NEXT:    .cfi_offset %r13, -56
93; CHECK-NEXT:    .cfi_offset %r14, -48
94; CHECK-NEXT:    .cfi_offset %r15, -40
95; CHECK-NEXT:    aghi %r15, -208
96; CHECK-NEXT:    .cfi_def_cfa_offset 368
97; CHECK-NEXT:    vl %v0, 0(%r3), 3
98; CHECK-NEXT:    vl %v1, 0(%r4), 3
99; CHECK-NEXT:    lgr %r13, %r2
100; CHECK-NEXT:    la %r2, 192(%r15)
101; CHECK-NEXT:    la %r3, 176(%r15)
102; CHECK-NEXT:    la %r4, 160(%r15)
103; CHECK-NEXT:    vst %v1, 160(%r15), 3
104; CHECK-NEXT:    vst %v0, 176(%r15), 3
105; CHECK-NEXT:    brasl %r14, __umodti3@PLT
106; CHECK-NEXT:    vl %v0, 192(%r15), 3
107; CHECK-NEXT:    vst %v0, 0(%r13), 3
108; CHECK-NEXT:    lmg %r13, %r15, 312(%r15)
109; CHECK-NEXT:    br %r14
110  %res = urem i128 %a, %b
111  ret i128 %res
112}
113