1; Test loading of 64-bit constants. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5declare void @foo(i64, i64, i64, i64) 6declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1 immarg) 7 8; Check 0. 9define i64 @f1() { 10; CHECK-LABEL: f1: 11; CHECK: lghi %r2, 0 12; CHECK-NEXT: br %r14 13 ret i64 0 14} 15 16; Check the high end of the LGHI range. 17define i64 @f2() { 18; CHECK-LABEL: f2: 19; CHECK: lghi %r2, 32767 20; CHECK-NEXT: br %r14 21 ret i64 32767 22} 23 24; Check the next value up, which must use LLILL instead. 25define i64 @f3() { 26; CHECK-LABEL: f3: 27; CHECK: llill %r2, 32768 28; CHECK-NEXT: br %r14 29 ret i64 32768 30} 31 32; Check the high end of the LLILL range. 33define i64 @f4() { 34; CHECK-LABEL: f4: 35; CHECK: llill %r2, 65535 36; CHECK-NEXT: br %r14 37 ret i64 65535 38} 39 40; Check the first useful LLILH value, which is the next one up. 41define i64 @f5() { 42; CHECK-LABEL: f5: 43; CHECK: llilh %r2, 1 44; CHECK-NEXT: br %r14 45 ret i64 65536 46} 47 48; Check the first useful LGFI value, which is the next one up again. 49define i64 @f6() { 50; CHECK-LABEL: f6: 51; CHECK: lgfi %r2, 65537 52; CHECK-NEXT: br %r14 53 ret i64 65537 54} 55 56; Check the high end of the LGFI range. 57define i64 @f7() { 58; CHECK-LABEL: f7: 59; CHECK: lgfi %r2, 2147483647 60; CHECK-NEXT: br %r14 61 ret i64 2147483647 62} 63 64; Check the next value up, which should use LLILH instead. 65define i64 @f8() { 66; CHECK-LABEL: f8: 67; CHECK: llilh %r2, 32768 68; CHECK-NEXT: br %r14 69 ret i64 2147483648 70} 71 72; Check the next value up again, which should use LLILF. 73define i64 @f9() { 74; CHECK-LABEL: f9: 75; CHECK: llilf %r2, 2147483649 76; CHECK-NEXT: br %r14 77 ret i64 2147483649 78} 79 80; Check the high end of the LLILH range. 81define i64 @f10() { 82; CHECK-LABEL: f10: 83; CHECK: llilh %r2, 65535 84; CHECK-NEXT: br %r14 85 ret i64 4294901760 86} 87 88; Check the next value up, which must use LLILF. 89define i64 @f11() { 90; CHECK-LABEL: f11: 91; CHECK: llilf %r2, 4294901761 92; CHECK-NEXT: br %r14 93 ret i64 4294901761 94} 95 96; Check the high end of the LLILF range. 97define i64 @f12() { 98; CHECK-LABEL: f12: 99; CHECK: llilf %r2, 4294967295 100; CHECK-NEXT: br %r14 101 ret i64 4294967295 102} 103 104; Check the lowest useful LLIHL value, which is the next one up. 105define i64 @f13() { 106; CHECK-LABEL: f13: 107; CHECK: llihl %r2, 1 108; CHECK-NEXT: br %r14 109 ret i64 4294967296 110} 111 112; Check the next value up, which must use a combination of two instructions. 113define i64 @f14() { 114; CHECK-LABEL: f14: 115; CHECK: llihl %r2, 1 116; CHECK-NEXT: oill %r2, 1 117; CHECK-NEXT: br %r14 118 ret i64 4294967297 119} 120 121; Check the high end of the OILL range. 122define i64 @f15() { 123; CHECK-LABEL: f15: 124; CHECK: llihl %r2, 1 125; CHECK-NEXT: oill %r2, 65535 126; CHECK-NEXT: br %r14 127 ret i64 4295032831 128} 129 130; Check the next value up, which should use OILH instead. 131define i64 @f16() { 132; CHECK-LABEL: f16: 133; CHECK: llihl %r2, 1 134; CHECK-NEXT: oilh %r2, 1 135; CHECK-NEXT: br %r14 136 ret i64 4295032832 137} 138 139; Check the next value up again, which should use OILF. 140define i64 @f17() { 141; CHECK-LABEL: f17: 142; CHECK: llihl %r2, 1 143; CHECK-NEXT: oilf %r2, 65537 144; CHECK-NEXT: br %r14 145 ret i64 4295032833 146} 147 148; Check the high end of the OILH range. 149define i64 @f18() { 150; CHECK-LABEL: f18: 151; CHECK: llihl %r2, 1 152; CHECK-NEXT: oilh %r2, 65535 153; CHECK-NEXT: br %r14 154 ret i64 8589869056 155} 156 157; Check the high end of the OILF range. 158define i64 @f19() { 159; CHECK-LABEL: f19: 160; CHECK: llihl %r2, 1 161; CHECK-NEXT: oilf %r2, 4294967295 162; CHECK-NEXT: br %r14 163 ret i64 8589934591 164} 165 166; Check the high end of the LLIHL range. 167define i64 @f20() { 168; CHECK-LABEL: f20: 169; CHECK: llihl %r2, 65535 170; CHECK-NEXT: br %r14 171 ret i64 281470681743360 172} 173 174; Check the lowest useful LLIHH value, which is 1<<32 greater than the above. 175define i64 @f21() { 176; CHECK-LABEL: f21: 177; CHECK: llihh %r2, 1 178; CHECK-NEXT: br %r14 179 ret i64 281474976710656 180} 181 182; Check the lowest useful LLIHF value, which is 1<<32 greater again. 183define i64 @f22() { 184; CHECK-LABEL: f22: 185; CHECK: llihf %r2, 65537 186; CHECK-NEXT: br %r14 187 ret i64 281479271677952 188} 189 190; Check the highest end of the LLIHH range. 191define i64 @f23() { 192; CHECK-LABEL: f23: 193; CHECK: llihh %r2, 65535 194; CHECK-NEXT: br %r14 195 ret i64 -281474976710656 196} 197 198; Check the next value up, which must use OILL too. 199define i64 @f24() { 200; CHECK-LABEL: f24: 201; CHECK: llihh %r2, 65535 202; CHECK-NEXT: oill %r2, 1 203; CHECK-NEXT: br %r14 204 ret i64 -281474976710655 205} 206 207; Check the high end of the LLIHF range. 208define i64 @f25() { 209; CHECK-LABEL: f25: 210; CHECK: llihf %r2, 4294967295 211; CHECK-NEXT: br %r14 212 ret i64 -4294967296 213} 214 215; Check -1. 216define i64 @f26() { 217; CHECK-LABEL: f26: 218; CHECK: lghi %r2, -1 219; CHECK-NEXT: br %r14 220 ret i64 -1 221} 222 223; Check the low end of the LGHI range. 224define i64 @f27() { 225; CHECK-LABEL: f27: 226; CHECK: lghi %r2, -32768 227; CHECK-NEXT: br %r14 228 ret i64 -32768 229} 230 231; Check the next value down, which must use LGFI instead. 232define i64 @f28() { 233; CHECK-LABEL: f28: 234; CHECK: lgfi %r2, -32769 235; CHECK-NEXT: br %r14 236 ret i64 -32769 237} 238 239; Check the low end of the LGFI range. 240define i64 @f29() { 241; CHECK-LABEL: f29: 242; CHECK: lgfi %r2, -2147483648 243; CHECK-NEXT: br %r14 244 ret i64 -2147483648 245} 246 247; Check the next value down, which needs a two-instruction sequence. 248define i64 @f30() { 249; CHECK-LABEL: f30: 250; CHECK: llihf %r2, 4294967295 251; CHECK-NEXT: oilf %r2, 2147483647 252; CHECK-NEXT: br %r14 253 ret i64 -2147483649 254} 255 256; Check that constant loads are rematerialized. 257define i64 @f31() { 258; CHECK-LABEL: f31: 259; CHECK-DAG: lghi %r2, 42 260; CHECK-DAG: lgfi %r3, 65537 261; CHECK-DAG: llilf %r4, 2147483649 262; CHECK-DAG: llihf %r5, 65537 263; CHECK: brasl %r14, foo@PLT 264; CHECK-DAG: llill %r2, 32768 265; CHECK-DAG: llilh %r3, 1 266; CHECK-DAG: llihl %r4, 1 267; CHECK-DAG: llihh %r5, 1 268; CHECK: brasl %r14, foo@PLT 269; CHECK-DAG: lghi %r2, 42 270; CHECK-DAG: lgfi %r3, 65537 271; CHECK-DAG: llilf %r4, 2147483649 272; CHECK-DAG: llihf %r5, 65537 273; CHECK: brasl %r14, foo@PLT 274; CHECK-DAG: llill %r2, 32768 275; CHECK-DAG: llilh %r3, 1 276; CHECK-DAG: llihl %r4, 1 277; CHECK-DAG: llihh %r5, 1 278; CHECK: brasl %r14, foo@PLT 279; CHECK: lghi %r2, 42 280; CHECK: br %r14 281 call void @foo(i64 42, i64 65537, i64 2147483649, i64 281479271677952) 282 call void @foo(i64 32768, i64 65536, i64 4294967296, i64 281474976710656) 283 call void @foo(i64 42, i64 65537, i64 2147483649, i64 281479271677952) 284 call void @foo(i64 32768, i64 65536, i64 4294967296, i64 281474976710656) 285 ret i64 42 286} 287 288; Verify that we do not crash on OR with two constant inputs 289; (this was PR34859). 290define i64 @f32(ptr %ptr) { 291; CHECK-LABEL: f32: 292; CHECK: llihf %r1, 918324340 293; CHECK: oilf %r1, 1806197964 294; CHECK: la %r0, 1(%r1) 295 store i64 -1, ptr %ptr, align 8 296 %1 = load i64, ptr %ptr, align 8 297 %2 = icmp ne i64 %1, 0 298 %3 = zext i1 %2 to i64 299 %4 = or i64 %3, 3944173009226982604 300 store i64 %4, ptr %ptr, align 8 301 ret i64 3944173009226982604 302} 303 304; Check that huge constants can be loaded during isel pseudo expansion. This 305; is the iteration count loaded into a register after dividing by 256. 306define void @f33(ptr %Src, ptr %Dst) { 307; CHECK-LABEL: f33: 308; CHECK: iihf %r0, 1 309; CHECK: iilf %r0, 1 310 call void @llvm.memcpy.p0.p0.i64(ptr %Src, ptr %Dst, i64 1099511628032, i1 false) 311 ret void 312} 313 314define void @f34(ptr %Src, ptr %Dst) { 315; CHECK-LABEL: f34: 316; CHECK: iihf %r0, 2 317; CHECK: iilf %r0, 0 318 call void @llvm.memcpy.p0.p0.i64(ptr %Src, ptr %Dst, i64 2199023255552, i1 false) 319 ret void 320} 321 322define void @f35(ptr %Src, ptr %Dst) { 323; CHECK-LABEL: f35: 324; CHECK: iihf %r0, 8388607 325; CHECK: iilf %r0, 4294967295 326 call void @llvm.memcpy.p0.p0.i64(ptr %Src, ptr %Dst, i64 9223372036854775800, i1 false) 327 ret void 328} 329