1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 3; 4; Test saving of vararg registers and backchain with packed stack. 5 6%struct.__va_list_tag = type { i64, i64, ptr, ptr } 7declare void @llvm.va_start(ptr) 8 9attributes #0 = { nounwind "packed-stack"="true" } 10define void @fun0(i64 %g0, double %d0, i64 %n, ...) #0 { 11; CHECK-LABEL: fun0: 12; CHECK: # %bb.0: # %entry 13; CHECK-NEXT: stmg %r4, %r15, 32(%r15) 14; CHECK-NEXT: aghi %r15, -192 15; CHECK-NEXT: std %f2, 328(%r15) 16; CHECK-NEXT: std %f4, 336(%r15) 17; CHECK-NEXT: std %f6, 344(%r15) 18; CHECK-NEXT: la %r0, 352(%r15) 19; CHECK-NEXT: stg %r0, 176(%r15) 20; CHECK-NEXT: la %r0, 192(%r15) 21; CHECK-NEXT: stg %r0, 184(%r15) 22; CHECK-NEXT: mvghi 160(%r15), 2 23; CHECK-NEXT: mvghi 168(%r15), 1 24; CHECK-NEXT: lmg %r6, %r15, 240(%r15) 25; CHECK-NEXT: br %r14 26entry: 27 %vl = alloca [1 x %struct.__va_list_tag], align 8 28 call void @llvm.va_start(ptr nonnull %vl) 29 ret void 30} 31 32attributes #1 = { nounwind "packed-stack"="true" "use-soft-float"="true" } 33define void @fun1(i64 %g0, double %d0, i64 %n, ...) #1 { 34; CHECK-LABEL: fun1: 35; CHECK: # %bb.0: # %entry 36; CHECK-NEXT: stmg %r5, %r15, 72(%r15) 37; CHECK-NEXT: aghi %r15, -160 38; CHECK-NEXT: la %r0, 192(%r15) 39; CHECK-NEXT: stg %r0, 184(%r15) 40; CHECK-NEXT: la %r0, 320(%r15) 41; CHECK-NEXT: stg %r0, 176(%r15) 42; CHECK-NEXT: mvghi 168(%r15), 0 43; CHECK-NEXT: mvghi 160(%r15), 3 44; CHECK-NEXT: lmg %r6, %r15, 240(%r15) 45; CHECK-NEXT: br %r14 46entry: 47 %vl = alloca [1 x %struct.__va_list_tag], align 8 48 call void @llvm.va_start(ptr nonnull %vl) 49 ret void 50} 51 52attributes #2 = { nounwind "packed-stack"="true" "use-soft-float"="true" "backchain"} 53define void @fun2(i64 %g0, double %d0, i64 %n, ...) #2 { 54; CHECK-LABEL: fun2: 55; CHECK: # %bb.0: # %entry 56; CHECK-NEXT: stmg %r5, %r15, 64(%r15) 57; CHECK-NEXT: lgr %r1, %r15 58; CHECK-NEXT: aghi %r15, -168 59; CHECK-NEXT: stg %r1, 152(%r15) 60; CHECK-NEXT: la %r0, 192(%r15) 61; CHECK-NEXT: stg %r0, 184(%r15) 62; CHECK-NEXT: la %r0, 328(%r15) 63; CHECK-NEXT: stg %r0, 176(%r15) 64; CHECK-NEXT: mvghi 168(%r15), 0 65; CHECK-NEXT: mvghi 160(%r15), 3 66; CHECK-NEXT: lmg %r6, %r15, 240(%r15) 67; CHECK-NEXT: br %r14 68entry: 69 %vl = alloca [1 x %struct.__va_list_tag], align 8 70 call void @llvm.va_start(ptr nonnull %vl) 71 ret void 72} 73 74