xref: /llvm-project/llvm/test/CodeGen/SystemZ/fp-cmp-zero.ll (revision 1d1893097a6319a6402331a54a588b1a5d961808) 
1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
2; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
3
4; Check comparisons with zero. If the tested value is live after the
5; comparison, load and test cannot be used to the same register.
6
7; Compared value is used afterwards.
8define i64 @f1(i64 %a, i64 %b, float %V, ptr %dst) {
9; CHECK-LABEL: f1:
10; CHECK: ltebr %f1, %f0
11  %cond = fcmp oeq float %V, 0.0
12  %res = select i1 %cond, i64 %a, i64 %b
13  store volatile float %V, ptr %dst
14  ret i64 %res
15}
16
17define i64 @f1m(i64 %a, i64 %b, float %V, ptr %dst) {
18; CHECK-LABEL: f1m:
19; CHECK: ltebr %f1, %f0
20  %cond = fcmp oeq float %V, -0.0
21  %res = select i1 %cond, i64 %a, i64 %b
22  store volatile float %V, ptr %dst
23  ret i64 %res
24}
25
26; Value only used in comparison.
27define i64 @f2(i64 %a, i64 %b, float %V) {
28; CHECK-LABEL: f2:
29; CHECK: ltebr %f0, %f0
30  %cond = fcmp oeq float %V, 0.0
31  %res = select i1 %cond, i64 %a, i64 %b
32  ret i64 %res
33}
34
35define i64 @f2m(i64 %a, i64 %b, float %V) {
36; CHECK-LABEL: f2m:
37; CHECK: ltebr %f0, %f0
38  %cond = fcmp oeq float %V, -0.0
39  %res = select i1 %cond, i64 %a, i64 %b
40  ret i64 %res
41}
42
43; Same for double
44define i64 @f3(i64 %a, i64 %b, double %V, ptr %dst) {
45; CHECK-LABEL: f3:
46; CHECK: ltdbr %f1, %f0
47  %cond = fcmp oeq double %V, 0.0
48  %res = select i1 %cond, i64 %a, i64 %b
49  store volatile double %V, ptr %dst
50  ret i64 %res
51}
52
53define i64 @f3m(i64 %a, i64 %b, double %V, ptr %dst) {
54; CHECK-LABEL: f3m:
55; CHECK: ltdbr %f1, %f0
56  %cond = fcmp oeq double %V, -0.0
57  %res = select i1 %cond, i64 %a, i64 %b
58  store volatile double %V, ptr %dst
59  ret i64 %res
60}
61
62define i64 @f4(i64 %a, i64 %b, double %V) {
63; CHECK-LABEL: f4:
64; CHECK: ltdbr %f0, %f0
65  %cond = fcmp oeq double %V, 0.0
66  %res = select i1 %cond, i64 %a, i64 %b
67  ret i64 %res
68}
69
70define i64 @f4m(i64 %a, i64 %b, double %V) {
71; CHECK-LABEL: f4m:
72; CHECK: ltdbr %f0, %f0
73  %cond = fcmp oeq double %V, -0.0
74  %res = select i1 %cond, i64 %a, i64 %b
75  ret i64 %res
76}
77
78; Same for fp128
79define i64 @f5(i64 %a, i64 %b, fp128 %V, ptr %dst) {
80; CHECK-LABEL: f5:
81; CHECK: ltxbr %f1, %f0
82  %cond = fcmp oeq fp128 %V, 0xL00000000000000008000000000000000
83  %res = select i1 %cond, i64 %a, i64 %b
84  store volatile fp128 %V, ptr %dst
85  ret i64 %res
86}
87
88define i64 @f6(i64 %a, i64 %b, fp128 %V) {
89; CHECK-LABEL: f6:
90; CHECK: ltxbr %f0, %f0
91  %cond = fcmp oeq fp128 %V, 0xL00000000000000008000000000000000
92  %res = select i1 %cond, i64 %a, i64 %b
93  ret i64 %res
94}
95