1; Test 64-bit atomic NANDs. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s 4 5; Check NANDs of a variable. 6define i64 @f1(i64 %dummy, ptr %src, i64 %b) { 7; CHECK-LABEL: f1: 8; CHECK: lg %r2, 0(%r3) 9; CHECK: [[LABEL:\.[^:]*]]: 10; CHECK: lgr %r0, %r2 11; CHECK: ngr %r0, %r4 12; CHECK: lcgr %r0, %r0 13; CHECK: aghi %r0, -1 14; CHECK: csg %r2, %r0, 0(%r3) 15; CHECK: jl [[LABEL]] 16; CHECK: br %r14 17 %res = atomicrmw nand ptr %src, i64 %b seq_cst 18 ret i64 %res 19} 20 21; Check NANDs of 1, which are done using a register. 22define i64 @f2(i64 %dummy, ptr %src) { 23; CHECK-LABEL: f2: 24; CHECK: lcgr %r0, %r2 25; CHECK: aghi %r0, -1 26; CHECK: oihf %r0, 4294967295 27; CHECK: oilf %r0, 4294967294 28; CHECK: br %r14 29 %res = atomicrmw nand ptr %src, i64 1 seq_cst 30 ret i64 %res 31} 32 33define i64 @f3(i64 %dummy, ptr %src) { 34; CHECK-LABEL: f3: 35; CHECK: lg %r2, 0(%r3) 36; CHECK: [[LABEL:\.[^:]*]]: 37; CHECK: lcgr %r0, %r2 38; CHECK: aghi %r0, -1 39; CHECK: oihf %r0, 4294967294 40; CHECK: jl [[LABEL]] 41; CHECK: br %r14 42 %res = atomicrmw nand ptr %src, i64 8589934591 seq_cst 43 ret i64 %res 44} 45 46define i64 @f4(i64 %dummy, ptr %src) { 47; CHECK-LABEL: f4: 48; CHECK: lg %r2, 0(%r3) 49; CHECK: [[LABEL:\.[^:]*]]: 50; CHECK: lcgr %r0, %r2 51; CHECK: aghi %r0, -1 52; CHECK: oihf %r0, 4294967293 53; CHECK: csg %r2, %r0, 0(%r3) 54; CHECK: jl [[LABEL]] 55; CHECK: br %r14 56 %res = atomicrmw nand ptr %src, i64 12884901887 seq_cst 57 ret i64 %res 58} 59 60define i64 @f5(i64 %dummy, ptr %src) { 61; CHECK-LABEL: f5: 62; CHECK: lcgr %r0, %r2 63; CHECK: aghi %r0, -1 64; CHECK: oihf %r0, 4294967292 65; CHECK: oilf %r0, 4294967295 66; CHECK: br %r14 67 %res = atomicrmw nand ptr %src, i64 12884901888 seq_cst 68 ret i64 %res 69} 70 71define i64 @f6(i64 %dummy, ptr %src) { 72; CHECK-LABEL: f6: 73; CHECK: lcgr %r0, %r2 74; CHECK: aghi %r0, -1 75; CHECK: oihh %r0, 65533 76; CHECK: br %r14 77 %res = atomicrmw nand ptr %src, i64 844424930131967 seq_cst 78 ret i64 %res 79} 80 81define i64 @f7(i64 %dummy, ptr %src) { 82; CHECK-LABEL: f7: 83; CHECK: lcgr %r0, %r2 84; CHECK: aghi %r0, -1 85; CHECK: oihf %r0, 4294901759 86; CHECK: oilf %r0, 4294967295 87; CHECK: br %r14 88 %res = atomicrmw nand ptr %src, i64 281474976710656 seq_cst 89 ret i64 %res 90} 91 92define i64 @f8(i64 %dummy, ptr %src) { 93; CHECK-LABEL: f8: 94; CHECK: lcgr %r0, %r2 95; CHECK: aghi %r0, -1 96; CHECK: oill %r0, 5 97; CHECK: br %r14 98 %res = atomicrmw nand ptr %src, i64 -6 seq_cst 99 ret i64 %res 100} 101 102define i64 @f9(i64 %dummy, ptr %src) { 103; CHECK-LABEL: f9: 104; CHECK: lcgr %r0, %r2 105; CHECK: aghi %r0, -1 106; CHECK: oill %r0, 65533 107; CHECK: br %r14 108 %res = atomicrmw nand ptr %src, i64 -65534 seq_cst 109 ret i64 %res 110} 111 112define i64 @f10(i64 %dummy, ptr %src) { 113; CHECK-LABEL: f10: 114; CHECK: lcgr %r0, %r2 115; CHECK: aghi %r0, -1 116; CHECK: oilf %r0, 65537 117; CHECK: br %r14 118 %res = atomicrmw nand ptr %src, i64 -65538 seq_cst 119 ret i64 %res 120} 121 122define i64 @f11(i64 %dummy, ptr %src) { 123; CHECK-LABEL: f11: 124; CHECK: lcgr %r0, %r2 125; CHECK: aghi %r0, -1 126; CHECK: oilh %r0, 5 127; CHECK: br %r14 128 %res = atomicrmw nand ptr %src, i64 -327681 seq_cst 129 ret i64 %res 130} 131 132define i64 @f12(i64 %dummy, ptr %src) { 133; CHECK-LABEL: f12: 134; CHECK: lcgr %r0, %r2 135; CHECK: aghi %r0, -1 136; CHECK: oilh %r0, 65533 137; CHECK: br %r14 138 %res = atomicrmw nand ptr %src, i64 -4294770689 seq_cst 139 ret i64 %res 140} 141 142define i64 @f13(i64 %dummy, ptr %src) { 143; CHECK-LABEL: f13: 144; CHECK: lcgr %r0, %r2 145; CHECK: aghi %r0, -1 146; CHECK: oilf %r0, 4294967293 147; CHECK: br %r14 148 %res = atomicrmw nand ptr %src, i64 -4294967294 seq_cst 149 ret i64 %res 150} 151 152define i64 @f14(i64 %dummy, ptr %src) { 153; CHECK-LABEL: f14: 154; CHECK: lcgr %r0, %r2 155; CHECK: aghi %r0, -1 156; CHECK: oihl %r0, 5 157; CHECK: br %r14 158 %res = atomicrmw nand ptr %src, i64 -21474836481 seq_cst 159 ret i64 %res 160} 161 162define i64 @f15(i64 %dummy, ptr %src) { 163; CHECK-LABEL: f15: 164; CHECK: lcgr %r0, %r2 165; CHECK: aghi %r0, -1 166; CHECK: oihl %r0, 65533 167; CHECK: br %r14 168 %res = atomicrmw nand ptr %src, i64 -281462091808769 seq_cst 169 ret i64 %res 170} 171 172define i64 @f16(i64 %dummy, ptr %src) { 173; CHECK-LABEL: f16: 174; CHECK: lcgr %r0, %r2 175; CHECK: aghi %r0, -1 176; CHECK: oihh %r0, 5 177; CHECK: br %r14 178 %res = atomicrmw nand ptr %src, i64 -1407374883553281 seq_cst 179 ret i64 %res 180} 181 182define i64 @f17(i64 %dummy, ptr %src) { 183; CHECK-LABEL: f17: 184; CHECK: lcgr %r0, %r2 185; CHECK: aghi %r0, -1 186; CHECK: oihf %r0, 65537 187; CHECK: br %r14 188 %res = atomicrmw nand ptr %src, i64 -281479271677953 seq_cst 189 ret i64 %res 190} 191