1; Test the "Q" asm constraint, which accepts addresses that have a base 2; and a 12-bit displacement. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s 5 6; Check the lowest range. 7define void @f1(i64 %base) { 8; CHECK-LABEL: f1: 9; CHECK: blah 0(%r2) 10; CHECK: br %r14 11 %addr = inttoptr i64 %base to ptr 12 call void asm "blah $0", "=*Q" (ptr elementtype(i64) %addr) 13 ret void 14} 15 16; Check the next lowest byte. 17define void @f2(i64 %base) { 18; CHECK-LABEL: f2: 19; CHECK: aghi %r2, -1 20; CHECK: blah 0(%r2) 21; CHECK: br %r14 22 %add = add i64 %base, -1 23 %addr = inttoptr i64 %add to ptr 24 call void asm "blah $0", "=*Q" (ptr elementtype(i64) %addr) 25 ret void 26} 27 28; Check the highest range. 29define void @f3(i64 %base) { 30; CHECK-LABEL: f3: 31; CHECK: blah 4095(%r2) 32; CHECK: br %r14 33 %add = add i64 %base, 4095 34 %addr = inttoptr i64 %add to ptr 35 call void asm "blah $0", "=*Q" (ptr elementtype(i64) %addr) 36 ret void 37} 38 39; Check the next highest byte. 40define void @f4(i64 %base) { 41; CHECK-LABEL: f4: 42; CHECK: aghi %r2, 4096 43; CHECK: blah 0(%r2) 44; CHECK: br %r14 45 %add = add i64 %base, 4096 46 %addr = inttoptr i64 %add to ptr 47 call void asm "blah $0", "=*Q" (ptr elementtype(i64) %addr) 48 ret void 49} 50 51; Check that indices aren't allowed 52define void @f5(i64 %base, i64 %index) { 53; CHECK-LABEL: f5: 54; CHECK: agr %r2, %r3 55; CHECK: blah 0(%r2) 56; CHECK: br %r14 57 %add = add i64 %base, %index 58 %addr = inttoptr i64 %add to ptr 59 call void asm "blah $0", "=*Q" (ptr elementtype(i64) %addr) 60 ret void 61} 62 63; Check A, O and R format flags. 64define void @f6(i64 %base) { 65; CHECK-LABEL: f6: 66; CHECK: blah 111,%r2 67; CHECK: br %r14 68 %add = add i64 %base, 111 69 %addr = inttoptr i64 %add to ptr 70 call void asm "blah ${0:O},${0:R}${0:A}", "=*Q" (ptr elementtype(i64) %addr) 71 ret void 72} 73