xref: /llvm-project/llvm/test/CodeGen/SystemZ/DAGCombiner_isAlias.ll (revision a1710eb3cd5823c5d14899112ca3086acbdbe9cb) 
1; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s  | FileCheck %s
2;
3; Check that the second load of @g_2 is not incorrectly eliminated by
4; DAGCombiner. It is needed since the preceding store is aliasing.
5
6; %.b1.i = load i1, ptr @g_2, align 4
7; ...
8; %g_717.sink.i = select i1 %cmp.i, ptr @g_717, ptr @g_2
9; store i1 true, ptr %g_717.sink.i, align 4
10; %.b = load i1, ptr @g_2, align 4
11
12; CHECK: # %bb.6: # %crc32_gentab.exit
13; CHECK:        larl    %r2, g_2
14; CHECK-NEXT:   llc     %r3, 0(%r2)
15; CHECK-NOT:    %r2
16; CHECK:        llc     %r1, 0(%r2)
17
18@g_2 = external hidden unnamed_addr global i1, align 4
19@.str.1 = external hidden unnamed_addr constant [4 x i8], align 2
20@g_717 = external hidden unnamed_addr global i1, align 4
21@.str.2 = external hidden unnamed_addr constant [6 x i8], align 2
22@crc32_context = external hidden unnamed_addr global i32, align 4
23@crc32_tab = external hidden unnamed_addr global [256 x i32], align 4
24@g_5 = external hidden unnamed_addr global i32, align 4
25@.str.4 = external hidden unnamed_addr constant [15 x i8], align 2
26
27; Function Attrs: nounwind
28define signext i32 @main(i32 signext %argc, ptr nocapture readonly %argv) local_unnamed_addr #0 {
29entry:
30  %cmp = icmp eq i32 %argc, 2
31  br i1 %cmp, label %cond.true, label %vector.ph
32
33cond.true:                                        ; preds = %entry
34  %arrayidx = getelementptr inbounds ptr, ptr %argv, i64 1
35  %0 = load ptr, ptr %arrayidx, align 8, !tbaa !2
36  %1 = load i8, ptr %0, align 1, !tbaa !6
37  %conv4 = zext i8 %1 to i32
38  %sub = sub nsw i32 49, %conv4
39  %cmp8 = icmp eq i32 %sub, 0
40  br i1 %cmp8, label %if.then, label %if.end35
41
42if.then:                                          ; preds = %cond.true
43  %arrayidx11 = getelementptr inbounds i8, ptr %0, i64 1
44  %2 = load i8, ptr %arrayidx11, align 1, !tbaa !6
45  %conv12 = zext i8 %2 to i32
46  %sub13 = sub nsw i32 0, %conv12
47  br label %if.end35
48
49if.end35:                                         ; preds = %if.then, %cond.true
50  %__result.0 = phi i32 [ %sub13, %if.then ], [ %sub, %cond.true ]
51  %phitmp = icmp eq i32 %__result.0, 0
52  %spec.select = zext i1 %phitmp to i32
53  br label %vector.ph
54
55vector.ph:                                        ; preds = %if.end35, %entry
56  %print_hash_value.0 = phi i32 [ 0, %entry ], [ %spec.select, %if.end35 ]
57  br label %vector.body
58
59vector.body:                                      ; preds = %vector.body, %vector.ph
60  %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
61  %vec.ind22 = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ %vec.ind.next23, %vector.body ]
62  %3 = and <4 x i32> %vec.ind22, <i32 1, i32 1, i32 1, i32 1>
63  %4 = icmp eq <4 x i32> %3, zeroinitializer
64  %5 = lshr <4 x i32> %vec.ind22, <i32 1, i32 1, i32 1, i32 1>
65  %6 = xor <4 x i32> %5, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
66  %7 = select <4 x i1> %4, <4 x i32> %5, <4 x i32> %6
67  %8 = and <4 x i32> %7, <i32 1, i32 1, i32 1, i32 1>
68  %9 = icmp eq <4 x i32> %8, zeroinitializer
69  %10 = lshr <4 x i32> %7, <i32 1, i32 1, i32 1, i32 1>
70  %11 = xor <4 x i32> %10, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
71  %12 = select <4 x i1> %9, <4 x i32> %10, <4 x i32> %11
72  %13 = and <4 x i32> %12, <i32 1, i32 1, i32 1, i32 1>
73  %14 = icmp eq <4 x i32> %13, zeroinitializer
74  %15 = lshr <4 x i32> %12, <i32 1, i32 1, i32 1, i32 1>
75  %16 = xor <4 x i32> %15, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
76  %17 = select <4 x i1> %14, <4 x i32> %15, <4 x i32> %16
77  %18 = and <4 x i32> %17, <i32 1, i32 1, i32 1, i32 1>
78  %19 = icmp eq <4 x i32> %18, zeroinitializer
79  %20 = lshr <4 x i32> %17, <i32 1, i32 1, i32 1, i32 1>
80  %21 = xor <4 x i32> %20, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
81  %22 = select <4 x i1> %19, <4 x i32> %20, <4 x i32> %21
82  %23 = and <4 x i32> %22, <i32 1, i32 1, i32 1, i32 1>
83  %24 = icmp eq <4 x i32> %23, zeroinitializer
84  %25 = lshr <4 x i32> %22, <i32 1, i32 1, i32 1, i32 1>
85  %26 = xor <4 x i32> %25, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
86  %27 = select <4 x i1> %24, <4 x i32> %25, <4 x i32> %26
87  %28 = and <4 x i32> %27, <i32 1, i32 1, i32 1, i32 1>
88  %29 = icmp eq <4 x i32> %28, zeroinitializer
89  %30 = lshr <4 x i32> %27, <i32 1, i32 1, i32 1, i32 1>
90  %31 = xor <4 x i32> %30, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
91  %32 = select <4 x i1> %29, <4 x i32> %30, <4 x i32> %31
92  %33 = and <4 x i32> %32, <i32 1, i32 1, i32 1, i32 1>
93  %34 = icmp eq <4 x i32> %33, zeroinitializer
94  %35 = lshr <4 x i32> %32, <i32 1, i32 1, i32 1, i32 1>
95  %36 = xor <4 x i32> %35, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
96  %37 = select <4 x i1> %34, <4 x i32> %35, <4 x i32> %36
97  %38 = and <4 x i32> %37, <i32 1, i32 1, i32 1, i32 1>
98  %39 = icmp eq <4 x i32> %38, zeroinitializer
99  %40 = lshr <4 x i32> %37, <i32 1, i32 1, i32 1, i32 1>
100  %41 = xor <4 x i32> %40, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
101  %42 = select <4 x i1> %39, <4 x i32> %40, <4 x i32> %41
102  %43 = getelementptr inbounds [256 x i32], ptr @crc32_tab, i64 0, i64 %index
103  store <4 x i32> %42, ptr %43, align 4, !tbaa !7
104  %index.next = add i64 %index, 4
105  %vec.ind.next23 = add <4 x i32> %vec.ind22, <i32 4, i32 4, i32 4, i32 4>
106  %44 = icmp eq i64 %index.next, 256
107  br i1 %44, label %crc32_gentab.exit, label %vector.body
108
109crc32_gentab.exit:                                ; preds = %vector.body
110  %45 = load i32, ptr @g_5, align 4, !tbaa !7
111  %.b1.i = load i1, ptr @g_2, align 4
112  %46 = select i1 %.b1.i, i32 1, i32 2
113  %and.i21 = and i32 %46, %45
114  store i32 %and.i21, ptr @g_5, align 4, !tbaa !7
115  %cmp.i = icmp eq i32 %and.i21, 1
116  %g_717.sink.i = select i1 %cmp.i, ptr @g_717, ptr @g_2
117  store i1 true, ptr %g_717.sink.i, align 4
118  %.b = load i1, ptr @g_2, align 4
119  %conv44 = select i1 %.b, i64 1, i64 2
120  tail call fastcc void @transparent_crc(i64 %conv44, ptr @.str.1, i32 signext %print_hash_value.0)
121  %.b20 = load i1, ptr @g_717, align 4
122  %conv45 = select i1 %.b20, i64 2, i64 0
123  tail call fastcc void @transparent_crc(i64 %conv45, ptr @.str.2, i32 signext %print_hash_value.0)
124  %47 = load i32, ptr @crc32_context, align 4, !tbaa !7
125  %48 = xor i32 %47, -1
126  %call.i = tail call signext i32 (ptr, ...) @printf(ptr @.str.4, i32 zeroext %48) #2
127  ret i32 0
128}
129
130; Function Attrs: nounwind
131declare hidden fastcc void @transparent_crc(i64, ptr, i32 signext) unnamed_addr #0
132
133; Function Attrs: nounwind
134declare signext i32 @printf(ptr nocapture readonly, ...) local_unnamed_addr #1
135
136!2 = !{!3, !3, i64 0}
137!3 = !{!"any pointer", !4, i64 0}
138!4 = !{!"omnipotent char", !5, i64 0}
139!5 = !{!"Simple C/C++ TBAA"}
140!6 = !{!4, !4, i64 0}
141!7 = !{!8, !8, i64 0}
142!8 = !{!"int", !4, i64 0}
143