xref: /llvm-project/llvm/test/CodeGen/SPIRV/transcoding/fp_contract_reassoc_fast_mode.ll (revision 0a443f13b49b3f392461a0bb60b0146cfc4607c7)
1; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
3
4; CHECK-SPIRV-NOT: OpCapability FPFastMathModeINTEL
5; CHECK-SPIRV:     OpName %[[#mu:]] "mul"
6; CHECK-SPIRV:     OpName %[[#su:]] "sub"
7; CHECK-SPIRV-NOT: OpDecorate %[[#mu]] FPFastMathMode AllowContractFastINTEL
8; CHECK-SPIRV-NOT: OpDecorate %[[#su]] FPFastMathMode AllowReassocINTEL
9
10define spir_kernel void @test(float %a, float %b) {
11entry:
12  %a.addr = alloca float, align 4
13  %b.addr = alloca float, align 4
14  store float %a, float* %a.addr, align 4
15  store float %b, float* %b.addr, align 4
16  %0 = load float, float* %a.addr, align 4
17  %1 = load float, float* %a.addr, align 4
18  %mul = fmul contract float %0, %1
19  store float %mul, float* %b.addr, align 4
20  %2 = load float, float* %b.addr, align 4
21  %3 = load float, float* %b.addr, align 4
22  %sub = fsub reassoc float %2, %3
23  store float %sub, float* %b.addr, align 4
24  ret void
25}
26