xref: /llvm-project/llvm/test/CodeGen/SPIRV/transcoding/fadd.ll (revision f9c98068c852c1bb1ec029c2c8df8ace9605f16f)
1; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
3
4; CHECK-SPIRV:     OpName %[[#r1:]] "r1"
5; CHECK-SPIRV:     OpName %[[#r2:]] "r2"
6; CHECK-SPIRV:     OpName %[[#r3:]] "r3"
7; CHECK-SPIRV:     OpName %[[#r4:]] "r4"
8; CHECK-SPIRV:     OpName %[[#r5:]] "r5"
9; CHECK-SPIRV:     OpName %[[#r6:]] "r6"
10; CHECK-SPIRV:     OpName %[[#r7:]] "r7"
11; CHECK-SPIRV:     OpName %[[#r1d:]] "r1"
12; CHECK-SPIRV:     OpName %[[#r2d:]] "r2"
13; CHECK-SPIRV:     OpName %[[#r3d:]] "r3"
14; CHECK-SPIRV:     OpName %[[#r4d:]] "r4"
15; CHECK-SPIRV:     OpName %[[#r5d:]] "r5"
16; CHECK-SPIRV:     OpName %[[#r6d:]] "r6"
17; CHECK-SPIRV:     OpName %[[#r7d:]] "r7"
18; CHECK-SPIRV-NOT: OpDecorate %[[#r1]] FPFastMathMode
19; CHECK-SPIRV-DAG: OpDecorate %[[#r2]] FPFastMathMode NotNaN
20; CHECK-SPIRV-DAG: OpDecorate %[[#r3]] FPFastMathMode NotInf
21; CHECK-SPIRV-DAG: OpDecorate %[[#r4]] FPFastMathMode NSZ
22; CHECK-SPIRV-DAG: OpDecorate %[[#r5]] FPFastMathMode AllowRecip
23; CHECK-SPIRV-DAG: OpDecorate %[[#r6]] FPFastMathMode NotNaN|NotInf|NSZ|AllowRecip|Fast
24; CHECK-SPIRV-DAG: OpDecorate %[[#r7]] FPFastMathMode NotNaN|NotInf
25; CHECK-SPIRV-DAG: %[[#float:]] = OpTypeFloat 32
26; CHECK-SPIRV-DAG: %[[#double:]] = OpTypeFloat 64
27
28; CHECK-SPIRV:     %[[#r1]] = OpFAdd %[[#float]]
29; CHECK-SPIRV:     %[[#r2]] = OpFAdd %[[#float]]
30; CHECK-SPIRV:     %[[#r3]] = OpFAdd %[[#float]]
31; CHECK-SPIRV:     %[[#r4]] = OpFAdd %[[#float]]
32; CHECK-SPIRV:     %[[#r5]] = OpFAdd %[[#float]]
33; CHECK-SPIRV:     %[[#r6]] = OpFAdd %[[#float]]
34; CHECK-SPIRV:     %[[#r7]] = OpFAdd %[[#float]]
35define spir_kernel void @testFAdd_float(float %a, float %b) {
36entry:
37  %r1 = fadd float %a, %b
38  %r2 = fadd nnan float %a, %b
39  %r3 = fadd ninf float %a, %b
40  %r4 = fadd nsz float %a, %b
41  %r5 = fadd arcp float %a, %b
42  %r6 = fadd fast float %a, %b
43  %r7 = fadd nnan ninf float %a, %b
44  ret void
45}
46
47; CHECK-SPIRV:     %[[#r1d]] = OpFAdd %[[#double]]
48; CHECK-SPIRV:     %[[#r2d]] = OpFAdd %[[#double]]
49; CHECK-SPIRV:     %[[#r3d]] = OpFAdd %[[#double]]
50; CHECK-SPIRV:     %[[#r4d]] = OpFAdd %[[#double]]
51; CHECK-SPIRV:     %[[#r5d]] = OpFAdd %[[#double]]
52; CHECK-SPIRV:     %[[#r6d]] = OpFAdd %[[#double]]
53; CHECK-SPIRV:     %[[#r7d]] = OpFAdd %[[#double]]
54define spir_kernel void @testFAdd_double(double %a, double %b) {
55entry:
56  %r1 = fadd double %a, %b
57  %r2 = fadd nnan double %a, %b
58  %r3 = fadd ninf double %a, %b
59  %r4 = fadd nsz double %a, %b
60  %r5 = fadd arcp double %a, %b
61  %r6 = fadd fast double %a, %b
62  %r7 = fadd nnan ninf double %a, %b
63  ret void
64}
65