1; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - | FileCheck %s 2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %} 3 4; CHECK-DAG: OpName %[[#reg_0:]] "reg2" 5; CHECK-DAG: OpName %[[#reg_1:]] "reg1" 6 7target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1" 8target triple = "spirv-unknown-vulkan1.3-compute" 9 10define internal spir_func void @main() #0 { 11; CHECK: %[[#entry:]] = OpLabel 12; CHECK: OpBranch %[[#while_cond:]] 13entry: 14 %0 = call token @llvm.experimental.convergence.entry() 15 %a = alloca i32, align 4 16 %b = alloca i32, align 4 17 %cond = alloca i32, align 4 18 %i = alloca i32, align 4 19 store i32 1, ptr %cond, align 4 20 br label %while.cond 21 22; CHECK: %[[#while_cond]] = OpLabel 23; CHECK: OpSelectionMerge %[[#while_end:]] None 24; CHECK: OpBranchConditional %[[#cond:]] %[[#while_body:]] %[[#while_end]] 25while.cond: 26 %1 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ] 27 %2 = load i32, ptr %cond, align 4 28 %tobool = icmp ne i32 %2, 0 29 br i1 %tobool, label %while.body, label %while.end 30 31; CHECK: %[[#while_body]] = OpLabel 32; CHECK: OpSelectionMerge %[[#switch_end:]] None 33; CHECK: OpSwitch %[[#cond:]] %[[#switch_end]] 1 %[[#case_1:]] 2 %[[#case_2:]] 5 %[[#case_5:]] 34while.body: 35 %3 = load i32, ptr %b, align 4 36 switch i32 %3, label %sw.default [ 37 i32 1, label %sw.bb 38 i32 2, label %sw.bb1 39 i32 5, label %sw.bb2 40 ] 41 42; CHECK: %[[#case_5]] = OpLabel 43; CHECK: OpStore %[[#reg_0]] %[[#]] 44; CHECK: OpBranch %[[#switch_end]] 45sw.bb2: 46 store i32 5, ptr %a, align 4 47 br label %while.end 48 49; CHECK: %[[#case_2]] = OpLabel 50; CHECK: OpStore %[[#reg_0]] %[[#]] 51; CHECK: OpBranch %[[#switch_end]] 52sw.bb1: 53 store i32 3, ptr %a, align 4 54 br label %while.end 55 56; CHECK: %[[#case_1]] = OpLabel 57; CHECK: OpStore %[[#reg_0]] %[[#]] 58; CHECK: OpBranch %[[#switch_end]] 59sw.bb: 60 store i32 1, ptr %a, align 4 61 br label %while.end 62 63; CHECK: %[[#switch_end]] = OpLabel 64; CHECK: %[[#val:]] = OpLoad %[[#]] %[[#reg_0]] 65; CHECK: %[[#tmp:]] = OpIEqual %[[#type:]] %[[#]] %[[#val]] 66; CHECK: OpBranchConditional %[[#tmp]] %[[#sw_default:]] %[[#while_end]] 67 68; CHECK: %[[#sw_default]] = OpLabel 69; CHECK: OpStore %[[#]] %[[#B:]] Aligned 4 70; CHECK: OpBranch %[[#for_cond:]] 71sw.default: 72 store i32 0, ptr %i, align 4 73 br label %for.cond 74 75; CHECK: %[[#for_cond]] = OpLabel 76; CHECK: OpStore %[[#reg_1]] %[[#]] 77; CHECK: OpSelectionMerge %[[#for_merge:]] None 78; CHECK-NEXT: OpBranchConditional %[[#cond:]] %[[#for_merge]] %[[#for_end:]] 79for.cond: 80 %4 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %1) ] 81 %5 = load i32, ptr %i, align 4 82 %cmp = icmp slt i32 %5, 10 83 br i1 %cmp, label %for.body, label %for.end 84 85; CHECK: %[[#for_end]] = OpLabel 86; CHECK: OpStore %[[#reg_1]] %[[#]] 87; CHECK: OpBranch %[[#for_merge]] 88for.end: 89 br label %while.end 90 91; CHECK: %[[#for_merge]] = OpLabel 92; CHECK: %[[#val:]] = OpLoad %[[#]] %[[#reg_1]] 93; CHECK: %[[#tmp:]] = OpIEqual %[[#type:]] %[[#]] %[[#val]] 94; CHECK: OpBranchConditional %[[#tmp]] %[[#for_body:]] %[[#while_end]] 95 96; CHECK: %[[#for_body]] = OpLabel 97; CHECK: OpSelectionMerge %[[#if_merge:]] None 98; CHECK: OpBranchConditional %[[#cond:]] %[[#if_merge]] %[[#if_else:]] 99for.body: 100 %6 = load i32, ptr %cond, align 4 101 %tobool3 = icmp ne i32 %6, 0 102 br i1 %tobool3, label %if.then, label %if.else 103 104; CHECK: %[[#if_else]] = OpLabel 105; CHECK: OpBranch %[[#if_merge]] 106if.else: 107 br label %while.end 108 109; CHECK: %[[#if_merge]] = OpLabel 110; CHECK: OpBranch %[[#while_end]] 111if.then: 112 br label %while.end 113 114; CHECK: %[[#while_end]] = OpLabel 115; CHECK: OpReturn 116while.end: 117 ret void 118 119; CHECK-NOT: %[[#for_inc:]] = OpLabel 120; This block is not emitted since it's unreachable. 121for.inc: 122 %7 = load i32, ptr %i, align 4 123 %inc = add nsw i32 %7, 1 124 store i32 %inc, ptr %i, align 4 125 br label %for.cond 126 127} 128 129declare token @llvm.experimental.convergence.entry() #1 130declare token @llvm.experimental.convergence.loop() #1 131 132attributes #0 = { convergent noinline norecurse nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } 133attributes #1 = { convergent nocallback nofree nosync nounwind willreturn memory(none) } 134 135!llvm.module.flags = !{!0, !1, !2} 136 137!0 = !{i32 1, !"wchar_size", i32 4} 138!1 = !{i32 4, !"dx.disable_optimizations", i32 1} 139!2 = !{i32 7, !"frame-pointer", i32 2} 140