1; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - | FileCheck %s --match-full-lines 2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %} 3 4target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1" 5target triple = "spirv-unknown-vulkan-compute" 6 7define internal spir_func void @main() #0 { 8 9; CHECK-DAG: OpName %[[#idx:]] "idx" 10; CHECK-DAG: OpName %[[#reg_0:]] "reg" 11; CHECK-DAG: OpDecorate %[[#builtin:]] BuiltIn SubgroupLocalInvocationId 12; CHECK-DAG: %[[#int_ty:]] = OpTypeInt 32 0 13; CHECK-DAG: %[[#bool_ty:]] = OpTypeBool 14; CHECK-DAG: %[[#int_0:]] = OpConstant %[[#int_ty]] 0 15; CHECK-DAG: %[[#int_1:]] = OpConstant %[[#int_ty]] 1 16; CHECK-DAG: %[[#int_2:]] = OpConstant %[[#int_ty]] 2 17; CHECK-DAG: %[[#int_10:]] = OpConstant %[[#int_ty]] 10 18 19; CHECK: %[[#entry:]] = OpLabel 20; CHECK: %[[#idx]] = OpVariable %[[#]] Function 21; CHECK: OpStore %[[#idx]] %[[#int_0]] Aligned 4 22; CHECK: OpBranch %[[#while_cond:]] 23entry: 24 %0 = call token @llvm.experimental.convergence.entry() 25 %idx = alloca i32, align 4 26 store i32 0, ptr %idx, align 4 27 br label %while.cond 28 29; CHECK: %[[#while_cond]] = OpLabel 30; CHECK: OpStore %[[#reg_0]] %[[#]] Aligned 4 31; CHECK: %[[#tmp:]] = OpLoad %[[#int_ty]] %[[#idx]] Aligned 4 32; CHECK: %[[#cmp:]] = OpINotEqual %[[#bool_ty]] %[[#tmp]] %[[#int_10]] 33; CHECK: OpLoopMerge %[[#new_end:]] %[[#if_end2:]] None 34; CHECK: OpBranchConditional %[[#cmp]] %[[#while_body:]] %[[#new_end]] 35while.cond: 36 %1 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ] 37 %2 = load i32, ptr %idx, align 4 38 %cmp = icmp ne i32 %2, 10 39 br i1 %cmp, label %while.body, label %while.end 40 41; CHECK: %[[#while_body]] = OpLabel 42; CHECK: OpStore %[[#reg_0]] %[[#]] Aligned 4 43; CHECK: %[[#tmp:]] = OpLoad %[[#]] %[[#builtin]] Aligned 1 44; CHECK: OpStore %[[#idx]] %[[#tmp]] Aligned 4 45; CHECK: %[[#tmp:]] = OpLoad %[[#int_ty]] %[[#idx]] Aligned 4 46; CHECK: %[[#cmp1:]] = OpIEqual %[[#bool_ty]] %[[#tmp]] %[[#int_0]] 47; CHECK: OpBranchConditional %[[#cmp1]] %[[#new_end]] %[[#if_end:]] 48while.body: 49 %3 = call i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %1) ] 50 store i32 %3, ptr %idx, align 4 51 %4 = load i32, ptr %idx, align 4 52 %cmp1 = icmp eq i32 %4, 0 53 br i1 %cmp1, label %if.then, label %if.end 54 55; CHECK: %[[#if_end]] = OpLabel 56; CHECK: OpStore %[[#reg_0]] %[[#]] Aligned 4 57; CHECK: %[[#tmp:]] = OpLoad %[[#int_ty]] %[[#builtin]] Aligned 1 58; CHECK: OpStore %[[#idx]] %[[#tmp]] Aligned 4 59; CHECK: %[[#tmp:]] = OpLoad %[[#int_ty]] %[[#idx]] Aligned 4 60; CHECK: %[[#cmp2:]] = OpIEqual %[[#bool_ty]] %[[#tmp]] %[[#int_0]] 61; CHECK: OpBranchConditional %[[#cmp2]] %[[#new_end]] %[[#if_end2]] 62if.end: 63 %5 = call i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %1) ] 64 store i32 %5, ptr %idx, align 4 65 %6 = load i32, ptr %idx, align 4 66 %cmp2 = icmp eq i32 %6, 0 67 br i1 %cmp2, label %if.then2, label %if.end2 68 69; CHECK: %[[#if_end2]] = OpLabel 70; CHECK: OpBranch %[[#while_cond]] 71 72; TODO: this OpSwitch is useless. Improve the "remove useless branches" step of the structurizer to 73; cleanup those. 74; CHECK: %[[#new_end]] = OpLabel 75; CHECK: %[[#route:]] = OpLoad %[[#]] %[[#reg_0]] Aligned 4 76; CHECK: OpSwitch %[[#route]] %[[#while_end:]] 1 %[[#while_end:]] 2 %[[#while_end:]] 77 78if.end2: 79 br label %while.cond 80 81; CHECK: %[[#while_end]] = OpLabel 82; CHECK: OpReturn 83while.end: 84 ret void 85 86; Those blocks are removed by the structurizer. 87if.then: 88 br label %while.end 89 90if.then2: 91 br label %while.end 92} 93 94declare token @llvm.experimental.convergence.entry() #1 95declare token @llvm.experimental.convergence.loop() #1 96declare i32 @__hlsl_wave_get_lane_index() convergent 97 98attributes #0 = { convergent noinline norecurse nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" } 99attributes #1 = { convergent nocallback nofree nosync nounwind willreturn memory(none) } 100 101!llvm.module.flags = !{!0, !1} 102 103!0 = !{i32 1, !"wchar_size", i32 4} 104!1 = !{i32 4, !"dx.disable_optimizations", i32 1} 105