xref: /llvm-project/llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll (revision 83c1d003118a2cb8136fe49e2ec43958c93d9d6b)
1; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
2
3; CHECK-DAG: OpDecorate %[[#Memset_p0i32:]] LinkageAttributes "spirv.llvm_memset_p0_i32" Export
4; CHECK-DAG: OpDecorate %[[#Memset_p3i32:]] LinkageAttributes "spirv.llvm_memset_p3_i32" Export
5; CHECK-DAG: OpDecorate %[[#Memset_p1i64:]] LinkageAttributes "spirv.llvm_memset_p1_i64" Export
6; CHECK-DAG: OpDecorate %[[#Memset_p1i64:]] LinkageAttributes "spirv.llvm_memset_p1_i64.volatile" Export
7
8; CHECK-DAG: %[[#Int8:]] = OpTypeInt 8 0
9; CHECK-DAG: %[[#Int32:]] = OpTypeInt 32 0
10; CHECK-DAG: %[[#Int64:]] = OpTypeInt 64 0
11; CHECK-DAG: %[[#Void:]] = OpTypeVoid
12; CHECK-DAG: %[[#Int8Ptr:]] = OpTypePointer Generic %[[#Int8]]
13
14; CHECK-DAG: %[[#Const4:]] = OpConstant %[[#Int32]] 4
15; CHECK-DAG: %[[#Int8x4:]] = OpTypeArray %[[#Int8]] %[[#Const4]]
16
17; CHECK-DAG: %[[#Const12:]] = OpConstant %[[#Int32]] 12
18; CHECK-DAG: %[[#Int8x12:]] = OpTypeArray %[[#Int8]] %[[#Const12]]
19
20; CHECK-DAG: %[[#Const21:]] = OpConstant %[[#Int8]] 21
21; CHECK-DAG: %[[#False:]] = OpConstantFalse %[[#]]
22; CHECK-DAG: %[[#ConstComp:]] = OpConstantComposite %[[#Int8x4]] %[[#Const21]] %[[#Const21]] %[[#Const21]] %[[#Const21]]
23; CHECK-DAG: %[[#ConstNull:]] = OpConstantNull %[[#Int8x12]]
24; CHECK-DAG: %[[#VarComp:]] = OpVariable %[[#]] UniformConstant %[[#ConstComp]]
25; CHECK-DAG: %[[#VarNull:]] = OpVariable %[[#]] UniformConstant %[[#ConstNull]]
26
27; CHECK-DAG: %[[#Int8PtrConst:]] = OpTypePointer UniformConstant %[[#Int8]]
28; CHECK: OpCopyMemorySized %[[#Target:]] %[[#Source:]] %[[#Const12]] Aligned 4
29
30; CHECK: %[[#SourceComp:]] = OpBitcast %[[#Int8PtrConst]] %[[#VarComp]]
31; CHECK: OpCopyMemorySized %[[#]] %[[#SourceComp]] %[[#Const4]] Aligned 4
32
33; CHECK-SPIRV: %[[#]] = OpFunctionCall %[[#]] %[[#Memset_p0i32]] %[[#]] %[[#]] %[[#]] %[[#False]]
34
35; CHECK: %[[#Memset_p0i32]] = OpFunction %[[#]]
36; CHECK: %[[#Dest:]] = OpFunctionParameter %[[#]]
37; CHECK: %[[#Value:]] = OpFunctionParameter %[[#]]
38; CHECK: %[[#Len:]] = OpFunctionParameter %[[#]]
39; CHECK: %[[#Volatile:]] = OpFunctionParameter %[[#]]
40
41; CHECK: %[[#Entry:]] = OpLabel
42; CHECK: %[[#IsZeroLen:]] = OpIEqual %[[#]] %[[#Zero:]] %[[#Len]]
43; CHECK: OpBranchConditional %[[#IsZeroLen]] %[[#End:]] %[[#WhileBody:]]
44
45; CHECK: %[[#WhileBody]] = OpLabel
46; CHECK: %[[#Offset:]] = OpPhi %[[#]] %[[#Zero]] %[[#Entry]] %[[#OffsetInc:]] %[[#WhileBody]]
47; CHECK: %[[#Ptr:]] = OpInBoundsPtrAccessChain %[[#]] %[[#Dest]] %[[#Offset]]
48; CHECK: OpStore %[[#Ptr]] %[[#Value]] Aligned 1
49; CHECK: %[[#OffsetInc]] = OpIAdd %[[#]] %[[#Offset]] %[[#One:]]
50; CHECK: %[[#NotEnd:]] = OpULessThan %[[#]] %[[#OffsetInc]] %[[#Len]]
51; CHECK: OpBranchConditional %[[#NotEnd]] %[[#WhileBody]] %[[#End]]
52
53; CHECK: %[[#End]] = OpLabel
54; CHECK: OpReturn
55
56; CHECK: OpFunctionEnd
57
58%struct.S1 = type { i32, i32, i32 }
59
60define spir_func void @_Z5foo11v(%struct.S1 addrspace(4)* noalias nocapture sret(%struct.S1 addrspace(4)*) %agg.result, i32 %s1, i64 %s2, i8 %v) {
61  %x = alloca [4 x i8]
62  %x.bc = bitcast [4 x i8]* %x to i8*
63  %a = bitcast %struct.S1 addrspace(4)* %agg.result to i8 addrspace(4)*
64  tail call void @llvm.memset.p4i8.i32(i8 addrspace(4)* align 4 %a, i8 0, i32 12, i1 false)
65  tail call void @llvm.memset.p0i8.i32(i8* align 4 %x.bc, i8 21, i32 4, i1 false)
66
67  ;; non-const value
68  tail call void @llvm.memset.p0i8.i32(i8* align 4 %x.bc, i8 %v, i32 3, i1 false)
69
70  ;; non-const value and size
71  tail call void @llvm.memset.p0i8.i32(i8*  align 4 %x.bc, i8 %v, i32 %s1, i1 false)
72
73  ;; Address spaces, non-const value and size
74  %b = addrspacecast i8 addrspace(4)* %a to i8 addrspace(3)*
75  tail call void @llvm.memset.p3i8.i32(i8 addrspace(3)* align 4 %b, i8 %v, i32 %s1, i1 false)
76  %c = addrspacecast i8 addrspace(4)* %a to i8 addrspace(1)*
77  tail call void @llvm.memset.p1i8.i64(i8 addrspace(1)* align 4 %c, i8 %v, i64 %s2, i1 false)
78
79  ;; Volatile
80  tail call void @llvm.memset.p1i8.i64(i8 addrspace(1)* align 4 %c, i8 %v, i64 %s2, i1 true)
81  ret void
82}
83
84declare void @llvm.memset.p4i8.i32(i8 addrspace(4)* nocapture, i8, i32, i1)
85
86declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1)
87
88declare void @llvm.memset.p3i8.i32(i8 addrspace(3)*, i8, i32, i1)
89
90declare void @llvm.memset.p1i8.i64(i8 addrspace(1)*, i8, i64, i1)
91