xref: /llvm-project/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/clamp.ll (revision 36d757f8406a00539228e15b44bb850936871421)
1; RUN: llc  -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %}
3
4; CHECK-DAG: %[[#op_ext:]] = OpExtInstImport "GLSL.std.450"
5
6; CHECK-DAG: %[[#float_64:]] = OpTypeFloat 64
7; CHECK-DAG: %[[#float_32:]] = OpTypeFloat 32
8; CHECK-DAG: %[[#float_16:]] = OpTypeFloat 16
9
10; CHECK-DAG: %[[#int_64:]] = OpTypeInt 64
11; CHECK-DAG: %[[#int_32:]] = OpTypeInt 32
12; CHECK-DAG: %[[#int_16:]] = OpTypeInt 16
13
14; CHECK-DAG: %[[#vec4_float_64:]] = OpTypeVector %[[#float_64]] 4
15; CHECK-DAG: %[[#vec4_float_32:]] = OpTypeVector %[[#float_32]] 4
16; CHECK-DAG: %[[#vec4_float_16:]] = OpTypeVector %[[#float_16]] 4
17
18; CHECK-DAG: %[[#vec4_int_64:]] = OpTypeVector %[[#int_64]] 4
19; CHECK-DAG: %[[#vec4_int_32:]] = OpTypeVector %[[#int_32]] 4
20; CHECK-DAG: %[[#vec4_int_16:]] = OpTypeVector %[[#int_16]] 4
21
22; CHECK-LABEL: Begin function test_sclamp_i16
23define noundef i16 @test_sclamp_i16(i16 noundef %a, i16 noundef %b, i16 noundef %c) {
24entry:
25  ; CHECK: %[[#i16_arg0:]] = OpFunctionParameter %[[#int_16]]
26  ; CHECK: %[[#i16_arg1:]] = OpFunctionParameter %[[#int_16]]
27  ; CHECK: %[[#i16_arg2:]] = OpFunctionParameter %[[#int_16]]
28  ; CHECK: %[[#]] = OpExtInst %[[#int_16]] %[[#op_ext]] SClamp %[[#i16_arg0]] %[[#i16_arg1]] %[[#i16_arg2]]
29  %0 = call i16 @llvm.spv.sclamp.i16(i16 %a, i16 %b, i16 %c)
30  ret i16 %0
31}
32
33; CHECK-LABEL: Begin function test_sclamp_i32
34define noundef i32 @test_sclamp_i32(i32 noundef %a, i32 noundef %b, i32 noundef %c) {
35entry:
36  ; CHECK: %[[#i32_arg0:]] = OpFunctionParameter %[[#int_32]]
37  ; CHECK: %[[#i32_arg1:]] = OpFunctionParameter %[[#int_32]]
38  ; CHECK: %[[#i32_arg2:]] = OpFunctionParameter %[[#int_32]]
39  ; CHECK: %[[#]] = OpExtInst %[[#int_32]] %[[#op_ext]] SClamp %[[#i32_arg0]] %[[#i32_arg1]] %[[#i32_arg2]]
40  %0 = call i32 @llvm.spv.sclamp.i32(i32 %a, i32 %b, i32 %c)
41  ret i32 %0
42}
43
44; CHECK-LABEL: Begin function test_sclamp_i64
45define noundef i64 @test_sclamp_i64(i64 noundef %a, i64 noundef %b, i64 noundef %c) {
46entry:
47  ; CHECK: %[[#i64_arg0:]] = OpFunctionParameter %[[#int_64]]
48  ; CHECK: %[[#i64_arg1:]] = OpFunctionParameter %[[#int_64]]
49  ; CHECK: %[[#i64_arg2:]] = OpFunctionParameter %[[#int_64]]
50  ; CHECK: %[[#]] = OpExtInst %[[#int_64]] %[[#op_ext]] SClamp %[[#i64_arg0]] %[[#i64_arg1]] %[[#i64_arg2]]
51  %0 = call i64 @llvm.spv.sclamp.i64(i64 %a, i64 %b, i64 %c)
52  ret i64 %0
53}
54
55; CHECK-LABEL: Begin function test_nclamp_half
56define noundef half @test_nclamp_half(half noundef %a, half noundef %b, half noundef %c) {
57entry:
58  ; CHECK: %[[#f16_arg0:]] = OpFunctionParameter %[[#float_16]]
59  ; CHECK: %[[#f16_arg1:]] = OpFunctionParameter %[[#float_16]]
60  ; CHECK: %[[#f16_arg2:]] = OpFunctionParameter %[[#float_16]]
61  ; CHECK: %[[#]] = OpExtInst %[[#float_16]] %[[#op_ext]] NClamp %[[#f16_arg0]] %[[#f16_arg1]] %[[#f16_arg2]]
62  %0 = call half @llvm.spv.nclamp.f16(half %a, half %b, half %c)
63  ret half %0
64}
65
66; CHECK-LABEL: Begin function test_nclamp_float
67define noundef float @test_nclamp_float(float noundef %a, float noundef %b, float noundef %c) {
68entry:
69  ; CHECK: %[[#f32_arg0:]] = OpFunctionParameter %[[#float_32]]
70  ; CHECK: %[[#f32_arg1:]] = OpFunctionParameter %[[#float_32]]
71  ; CHECK: %[[#f32_arg2:]] = OpFunctionParameter %[[#float_32]]
72  ; CHECK: %[[#]] = OpExtInst %[[#float_32]] %[[#op_ext]] NClamp %[[#f32_arg0]] %[[#f32_arg1]] %[[#f32_arg2]]
73  %0 = call float @llvm.spv.nclamp.f32(float %a, float %b, float %c)
74  ret float %0
75}
76
77; CHECK-LABEL: Begin function test_nclamp_double
78define noundef double @test_nclamp_double(double noundef %a, double noundef %b, double noundef %c) {
79entry:
80  ; CHECK: %[[#f64_arg0:]] = OpFunctionParameter %[[#float_64]]
81  ; CHECK: %[[#f64_arg1:]] = OpFunctionParameter %[[#float_64]]
82  ; CHECK: %[[#f64_arg2:]] = OpFunctionParameter %[[#float_64]]
83  ; CHECK: %[[#]] = OpExtInst %[[#float_64]] %[[#op_ext]] NClamp %[[#f64_arg0]] %[[#f64_arg1]] %[[#f64_arg2]]
84  %0 = call double @llvm.spv.nclamp.f64(double %a, double %b, double %c)
85  ret double %0
86}
87
88; CHECK-LABEL: Begin function test_uclamp_i16
89define noundef i16 @test_uclamp_i16(i16 noundef %a, i16 noundef %b, i16 noundef %c) {
90entry:
91  ; CHECK: %[[#i16_arg0:]] = OpFunctionParameter %[[#int_16]]
92  ; CHECK: %[[#i16_arg1:]] = OpFunctionParameter %[[#int_16]]
93  ; CHECK: %[[#i16_arg2:]] = OpFunctionParameter %[[#int_16]]
94  ; CHECK: %[[#]] = OpExtInst %[[#int_16]] %[[#op_ext]] UClamp %[[#i16_arg0]] %[[#i16_arg1]] %[[#i16_arg2]]
95  %0 = call i16 @llvm.spv.uclamp.i16(i16 %a, i16 %b, i16 %c)
96  ret i16 %0
97}
98
99; CHECK-LABEL: Begin function test_uclamp_i32
100define noundef i32 @test_uclamp_i32(i32 noundef %a, i32 noundef %b, i32 noundef %c) {
101entry:
102  ; CHECK: %[[#i32_arg0:]] = OpFunctionParameter %[[#int_32]]
103  ; CHECK: %[[#i32_arg1:]] = OpFunctionParameter %[[#int_32]]
104  ; CHECK: %[[#i32_arg2:]] = OpFunctionParameter %[[#int_32]]
105  ; CHECK: %[[#]] = OpExtInst %[[#int_32]] %[[#op_ext]] UClamp %[[#i32_arg0]] %[[#i32_arg1]] %[[#i32_arg2]]
106  %0 = call i32 @llvm.spv.uclamp.i32(i32 %a, i32 %b, i32 %c)
107  ret i32 %0
108}
109
110; CHECK-LABEL: Begin function test_uclamp_i64
111define noundef i64 @test_uclamp_i64(i64 noundef %a, i64 noundef %b, i64 noundef %c) {
112entry:
113  ; CHECK: %[[#i64_arg0:]] = OpFunctionParameter %[[#int_64]]
114  ; CHECK: %[[#i64_arg1:]] = OpFunctionParameter %[[#int_64]]
115  ; CHECK: %[[#i64_arg2:]] = OpFunctionParameter %[[#int_64]]
116  ; CHECK: %[[#]] = OpExtInst %[[#int_64]] %[[#op_ext]] UClamp %[[#i64_arg0]] %[[#i64_arg1]] %[[#i64_arg2]]
117  %0 = call i64 @llvm.spv.uclamp.i64(i64 %a, i64 %b, i64 %c)
118  ret i64 %0
119}
120
121; CHECK-LABEL: Begin function test_sclamp_v4i16
122define noundef <4 x i16> @test_sclamp_v4i16(<4 x i16> noundef %a, <4 x i16> noundef %b, <4 x i16> noundef %c) {
123entry:
124  ; CHECK: %[[#vec4_i16_arg0:]] = OpFunctionParameter %[[#vec4_int_16]]
125  ; CHECK: %[[#vec4_i16_arg1:]] = OpFunctionParameter %[[#vec4_int_16]]
126  ; CHECK: %[[#vec4_i16_arg2:]] = OpFunctionParameter %[[#vec4_int_16]]
127  ; CHECK: %[[#]] = OpExtInst %[[#vec4_int_16]] %[[#op_ext]] SClamp %[[#vec4_i16_arg0]] %[[#vec4_i16_arg1]] %[[#vec4_i16_arg2]]
128  %0 = call <4 x i16> @llvm.spv.sclamp.v4i16(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c)
129  ret <4 x i16> %0
130}
131
132; CHECK-LABEL: Begin function test_sclamp_v4i32
133define noundef <4 x i32> @test_sclamp_v4i32(<4 x i32> noundef %a, <4 x i32> noundef %b, <4 x i32> noundef %c) {
134entry:
135  ; CHECK: %[[#vec4_i32_arg0:]] = OpFunctionParameter %[[#vec4_int_32]]
136  ; CHECK: %[[#vec4_i32_arg1:]] = OpFunctionParameter %[[#vec4_int_32]]
137  ; CHECK: %[[#vec4_i32_arg2:]] = OpFunctionParameter %[[#vec4_int_32]]
138  ; CHECK: %[[#]] = OpExtInst %[[#vec4_int_32]] %[[#op_ext]] SClamp %[[#vec4_i32_arg0]] %[[#vec4_i32_arg1]] %[[#vec4_i32_arg2]]
139  %0 = call <4 x i32> @llvm.spv.sclamp.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
140  ret <4 x i32> %0
141}
142
143; CHECK-LABEL: Begin function test_sclamp_v4i64
144define noundef <4 x i64> @test_sclamp_v4i64(<4 x i64> noundef %a, <4 x i64> noundef %b, <4 x i64> noundef %c) {
145entry:
146  ; CHECK: %[[#vec4_i64_arg0:]] = OpFunctionParameter %[[#vec4_int_64]]
147  ; CHECK: %[[#vec4_i64_arg1:]] = OpFunctionParameter %[[#vec4_int_64]]
148  ; CHECK: %[[#vec4_i64_arg2:]] = OpFunctionParameter %[[#vec4_int_64]]
149  ; CHECK: %[[#]] = OpExtInst %[[#vec4_int_64]] %[[#op_ext]] SClamp %[[#vec4_i64_arg0]] %[[#vec4_i64_arg1]] %[[#vec4_i64_arg2]]
150  %0 = call <4 x i64> @llvm.spv.sclamp.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c)
151  ret <4 x i64> %0
152}
153
154; CHECK-LABEL: Begin function test_nclamp_v4half
155define noundef <4 x half> @test_nclamp_v4half(<4 x half> noundef %a, <4 x half> noundef %b, <4 x half> noundef %c) {
156entry:
157  ; CHECK: %[[#vec4_f16_arg0:]] = OpFunctionParameter %[[#vec4_float_16]]
158  ; CHECK: %[[#vec4_f16_arg1:]] = OpFunctionParameter %[[#vec4_float_16]]
159  ; CHECK: %[[#vec4_f16_arg2:]] = OpFunctionParameter %[[#vec4_float_16]]
160  ; CHECK: %[[#]] = OpExtInst %[[#vec4_float_16]] %[[#op_ext]] NClamp %[[#vec4_f16_arg0]] %[[#vec4_f16_arg1]] %[[#vec4_f16_arg2]]
161  %0 = call <4 x half> @llvm.spv.nclamp.v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %c)
162  ret <4 x half> %0
163}
164
165; CHECK-LABEL: Begin function test_nclamp_v4float
166define noundef <4 x float> @test_nclamp_v4float(<4 x float> noundef %a, <4 x float> noundef %b, <4 x float> noundef %c) {
167entry:
168  ; CHECK: %[[#vec4_f32_arg0:]] = OpFunctionParameter %[[#vec4_float_32]]
169  ; CHECK: %[[#vec4_f32_arg1:]] = OpFunctionParameter %[[#vec4_float_32]]
170  ; CHECK: %[[#vec4_f32_arg2:]] = OpFunctionParameter %[[#vec4_float_32]]
171  ; CHECK: %[[#]] = OpExtInst %[[#vec4_float_32]] %[[#op_ext]] NClamp %[[#vec4_f32_arg0]] %[[#vec4_f32_arg1]] %[[#vec4_f32_arg2]]
172  %0 = call <4 x float> @llvm.spv.nclamp.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c)
173  ret <4 x float> %0
174}
175
176; CHECK-LABEL: Begin function test_nclamp_v4double
177define noundef <4 x double> @test_nclamp_v4double(<4 x double> noundef %a, <4 x double> noundef %b, <4 x double> noundef %c) {
178entry:
179  ; CHECK: %[[#vec4_f64_arg0:]] = OpFunctionParameter %[[#vec4_float_64]]
180  ; CHECK: %[[#vec4_f64_arg1:]] = OpFunctionParameter %[[#vec4_float_64]]
181  ; CHECK: %[[#vec4_f64_arg2:]] = OpFunctionParameter %[[#vec4_float_64]]
182  ; CHECK: %[[#]] = OpExtInst %[[#vec4_float_64]] %[[#op_ext]] NClamp %[[#vec4_f64_arg0]] %[[#vec4_f64_arg1]] %[[#vec4_f64_arg2]]
183  %0 = call <4 x double> @llvm.spv.nclamp.v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %c)
184  ret <4 x double> %0
185}
186
187; CHECK-LABEL: Begin function test_uclamp_v4i16
188define noundef <4 x i16> @test_uclamp_v4i16(<4 x i16> noundef %a, <4 x i16> noundef %b, <4 x i16> noundef %c) {
189entry:
190  ; CHECK: %[[#vec4_i16_arg0:]] = OpFunctionParameter %[[#vec4_int_16]]
191  ; CHECK: %[[#vec4_i16_arg1:]] = OpFunctionParameter %[[#vec4_int_16]]
192  ; CHECK: %[[#vec4_i16_arg2:]] = OpFunctionParameter %[[#vec4_int_16]]
193  ; CHECK: %[[#]] = OpExtInst %[[#vec4_int_16]] %[[#op_ext]] UClamp %[[#vec4_i16_arg0]] %[[#vec4_i16_arg1]] %[[#vec4_i16_arg2]]
194  %0 = call <4 x i16> @llvm.spv.uclamp.v4i16(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c)
195  ret <4 x i16> %0
196}
197
198; CHECK-LABEL: Begin function test_uclamp_v4i32
199define noundef <4 x i32> @test_uclamp_v4i32(<4 x i32> noundef %a, <4 x i32> noundef %b, <4 x i32> noundef %c) {
200entry:
201  ; CHECK: %[[#vec4_i32_arg0:]] = OpFunctionParameter %[[#vec4_int_32]]
202  ; CHECK: %[[#vec4_i32_arg1:]] = OpFunctionParameter %[[#vec4_int_32]]
203  ; CHECK: %[[#vec4_i32_arg2:]] = OpFunctionParameter %[[#vec4_int_32]]
204  ; CHECK: %[[#]] = OpExtInst %[[#vec4_int_32]] %[[#op_ext]] UClamp %[[#vec4_i32_arg0]] %[[#vec4_i32_arg1]] %[[#vec4_i32_arg2]]
205  %0 = call <4 x i32> @llvm.spv.uclamp.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
206  ret <4 x i32> %0
207}
208
209; CHECK-LABEL: Begin function test_uclamp_v4i64
210define noundef <4 x i64> @test_uclamp_v4i64(<4 x i64> noundef %a, <4 x i64> noundef %b, <4 x i64> noundef %c) {
211entry:
212  ; CHECK: %[[#vec4_i64_arg0:]] = OpFunctionParameter %[[#vec4_int_64]]
213  ; CHECK: %[[#vec4_i64_arg1:]] = OpFunctionParameter %[[#vec4_int_64]]
214  ; CHECK: %[[#vec4_i64_arg2:]] = OpFunctionParameter %[[#vec4_int_64]]
215  ; CHECK: %[[#]] = OpExtInst %[[#vec4_int_64]] %[[#op_ext]] UClamp %[[#vec4_i64_arg0]] %[[#vec4_i64_arg1]] %[[#vec4_i64_arg2]]
216  %0 = call <4 x i64> @llvm.spv.uclamp.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c)
217  ret <4 x i64> %0
218}
219
220declare half @llvm.spv.nclamp.f16(half, half, half)
221declare float @llvm.spv.nclamp.f32(float, float, float)
222declare double @llvm.spv.nclamp.f64(double, double, double)
223declare i16 @llvm.spv.sclamp.i16(i16, i16, i16)
224declare i32 @llvm.spv.sclamp.i32(i32, i32, i32)
225declare i64 @llvm.spv.sclamp.i64(i64, i64, i64)
226declare i16 @llvm.spv.uclamp.i16(i16, i16, i16)
227declare i32 @llvm.spv.uclamp.i32(i32, i32, i32)
228declare i64 @llvm.spv.uclamp.i64(i64, i64, i64)
229declare <4 x half> @llvm.spv.nclamp.v4f16(<4 x half>, <4 x half>, <4 x half>)
230declare <4 x float> @llvm.spv.nclamp.v4f32(<4 x float>, <4 x float>, <4 x float>)
231declare <4 x double> @llvm.spv.nclamp.v4f64(<4 x double>, <4 x double>, <4 x double>)
232declare <4 x i16> @llvm.spv.sclamp.v4i16(<4 x i16>, <4 x i16>, <4 x i16>)
233declare <4 x i32> @llvm.spv.sclamp.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
234declare <4 x i64> @llvm.spv.sclamp.v4i64(<4 x i64>, <4 x i64>, <4 x i64>)
235declare <4 x i16> @llvm.spv.uclamp.v4i16(<4 x i16>, <4 x i16>, <4 x i16>)
236declare <4 x i32> @llvm.spv.uclamp.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
237declare <4 x i64> @llvm.spv.uclamp.v4i64(<4 x i64>, <4 x i64>, <4 x i64>)
238
239
240