xref: /llvm-project/llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll (revision 53326ee0cf45fce3f80e2e98638dd27edb20c516)
1; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
2; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
3
4; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
5; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
6
7define i32 @test_switch_branches(i32 %a) {
8entry:
9  %alloc = alloca i32
10; CHECK-SPIRV:      OpSwitch %[[#]] %[[#DEFAULT:]] 1 %[[#CASE1:]] 2 %[[#CASE2:]] 3 %[[#CASE3:]]
11  switch i32 %a, label %default [
12    i32 1, label %case1
13    i32 2, label %case2
14    i32 3, label %case3
15  ]
16
17case1:
18  store i32 1, ptr %alloc
19  br label %end
20
21case2:
22  store i32 2, ptr %alloc
23  br label %end
24
25case3:
26  store i32 3, ptr %alloc
27  br label %end
28
29default:
30  store i32 0, ptr %alloc
31  br label %end
32
33end:
34  %result = load i32, ptr %alloc
35  ret i32 %result
36
37; CHECK-SPIRV:      %[[#CASE3]] = OpLabel
38; CHECK-SPIRV:      OpBranch %[[#END:]]
39
40; CHECK-SPIRV:      %[[#CASE2]] = OpLabel
41; CHECK-SPIRV:      OpBranch %[[#END]]
42
43; CHECK-SPIRV:      %[[#CASE1]] = OpLabel
44; CHECK-SPIRV:      OpBranch %[[#END]]
45
46; CHECK-SPIRV:      %[[#DEFAULT]] = OpLabel
47; CHECK-SPIRV:      OpBranch %[[#END]]
48
49; CHECK-SPIRV:      %[[#END]] = OpLabel
50; CHECK-SPIRV:                  OpReturnValue
51}
52