1; RUN: not llc -mtriple=sparc <%s 2>&1 | FileCheck %s 2; RUN: not llc -mtriple=sparcv9 <%s 2>&1 | FileCheck %s 3 4; CHECK: error: couldn't allocate input reg for constraint '{f32}' 5; CHECK: error: couldn't allocate input reg for constraint '{f21}' 6; CHECK: error: couldn't allocate input reg for constraint '{f38}' 7define void @test_constraint_float_reg() { 8entry: 9 tail call void asm sideeffect "fadds $0,$1,$2", "{f32},{f0},{f0}"(float 6.0, float 7.0, float 8.0) 10 tail call void asm sideeffect "faddd $0,$1,$2", "{f21},{f0},{f0}"(double 9.0, double 10.0, double 11.0) 11 tail call void asm sideeffect "faddq $0,$1,$2", "{f38},{f0},{f0}"(fp128 0xL0, fp128 0xL0, fp128 0xL0) 12 ret void 13} 14 15; CHECK: <unknown>:0: error: Hi part of pair should point to an even-numbered register 16; CHECK: <unknown>:0: error: (note that in some cases it might be necessary to manually bind the input/output registers instead of relying on automatic allocation) 17 18define i64 @test_twinword_error(){ 19 %1 = tail call i64 asm sideeffect "rd %asr5, ${0:L} \0A\09 srlx ${0:L}, 32, ${0:H}", "={i1}"() 20 ret i64 %1 21} 22