xref: /llvm-project/llvm/test/CodeGen/SPARC/fshl.ll (revision eaade37fddec5439f58587347ad7c463f7a41400)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s
3
4define <2 x i64> @fshl_v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> %z) {
5; CHECK-LABEL: fshl_v2i64:
6; CHECK:         .cfi_startproc
7; CHECK-NEXT:    .register %g2, #scratch
8; CHECK-NEXT:    .register %g3, #scratch
9; CHECK-NEXT:  ! %bb.0: ! %bb
10; CHECK-NEXT:    mov 63, %g2
11; CHECK-NEXT:    andn %g2, %o4, %g3
12; CHECK-NEXT:    srlx %o2, 1, %o2
13; CHECK-NEXT:    srlx %o2, %g3, %o2
14; CHECK-NEXT:    and %o4, 63, %o4
15; CHECK-NEXT:    sllx %o0, %o4, %o0
16; CHECK-NEXT:    or %o0, %o2, %o0
17; CHECK-NEXT:    andn %g2, %o5, %o2
18; CHECK-NEXT:    srlx %o3, 1, %o3
19; CHECK-NEXT:    srlx %o3, %o2, %o2
20; CHECK-NEXT:    and %o5, 63, %o3
21; CHECK-NEXT:    sllx %o1, %o3, %o1
22; CHECK-NEXT:    retl
23; CHECK-NEXT:    or %o1, %o2, %o1
24bb:
25  %i = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> %z)
26  ret <2 x i64> %i
27}
28
29define i32 @PR47303() {
30; CHECK-LABEL: PR47303:
31; CHECK:         .cfi_startproc
32; CHECK-NEXT:  ! %bb.0: ! %bb
33; CHECK-NEXT:    retl
34; CHECK-NEXT:    mov %g0, %o0
35bb:
36  %i = call <4 x i64> @llvm.fshl.v4i64(<4 x i64> undef, <4 x i64> undef, <4 x i64> <i64 57, i64 27, i64 12, i64 33>)
37  %i1 = add <4 x i64> %i, zeroinitializer
38  %i2 = add <4 x i64> %i1, zeroinitializer
39  %i3 = extractelement <4 x i64> %i2, i32 0
40  %i4 = add i64 0, %i3
41  %i5 = xor i64 0, %i4
42  %i6 = trunc i64 %i5 to i32
43  %i7 = mul i32 %i6, 797982799
44  ret i32 %i7
45}
46
47declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
48declare <4 x i64> @llvm.fshl.v4i64(<4 x i64>, <4 x i64>, <4 x i64>)
49