1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=sparc64 -sparc-bpcc-offset-bits=4 -sparc-bpr-offset-bits=4 | FileCheck --check-prefix=SPARC64 %s 3 4define i32 @branch_relax_int(i32 %in) { 5; SPARC64-LABEL: branch_relax_int: 6; SPARC64: .cfi_startproc 7; SPARC64-NEXT: ! %bb.0: 8; SPARC64-NEXT: save %sp, -128, %sp 9; SPARC64-NEXT: .cfi_def_cfa_register %fp 10; SPARC64-NEXT: .cfi_window_save 11; SPARC64-NEXT: .cfi_register %o7, %i7 12; SPARC64-NEXT: cmp %i0, 0 13; SPARC64-NEXT: bne %icc, .LBB0_1 14; SPARC64-NEXT: nop 15; SPARC64-NEXT: ba .LBB0_2 16; SPARC64-NEXT: nop 17; SPARC64-NEXT: .LBB0_1: ! %false 18; SPARC64-NEXT: !APP 19; SPARC64-NEXT: nop 20; SPARC64-NEXT: nop 21; SPARC64-NEXT: nop 22; SPARC64-NEXT: nop 23; SPARC64-NEXT: nop 24; SPARC64-NEXT: nop 25; SPARC64-NEXT: nop 26; SPARC64-NEXT: nop 27; SPARC64-NEXT: !NO_APP 28; SPARC64-NEXT: ret 29; SPARC64-NEXT: restore %g0, %g0, %o0 30; SPARC64-NEXT: .LBB0_2: ! %true 31; SPARC64-NEXT: mov 4, %i0 32; SPARC64-NEXT: !APP 33; SPARC64-NEXT: nop 34; SPARC64-NEXT: nop 35; SPARC64-NEXT: nop 36; SPARC64-NEXT: nop 37; SPARC64-NEXT: nop 38; SPARC64-NEXT: nop 39; SPARC64-NEXT: nop 40; SPARC64-NEXT: nop 41; SPARC64-NEXT: !NO_APP 42; SPARC64-NEXT: ret 43; SPARC64-NEXT: restore 44 %tst = icmp eq i32 %in, 0 45 br i1 %tst, label %true, label %false 46 47true: 48 call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""() 49 ret i32 4 50 51false: 52 call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""() 53 ret i32 0 54} 55 56define i64 @branch_relax_reg(i64 %in) { 57; SPARC64-LABEL: branch_relax_reg: 58; SPARC64: .cfi_startproc 59; SPARC64-NEXT: ! %bb.0: 60; SPARC64-NEXT: save %sp, -128, %sp 61; SPARC64-NEXT: .cfi_def_cfa_register %fp 62; SPARC64-NEXT: .cfi_window_save 63; SPARC64-NEXT: .cfi_register %o7, %i7 64; SPARC64-NEXT: brnz %i0, .LBB1_1 65; SPARC64-NEXT: nop 66; SPARC64-NEXT: ba .LBB1_2 67; SPARC64-NEXT: nop 68; SPARC64-NEXT: .LBB1_1: ! %false 69; SPARC64-NEXT: !APP 70; SPARC64-NEXT: nop 71; SPARC64-NEXT: nop 72; SPARC64-NEXT: nop 73; SPARC64-NEXT: nop 74; SPARC64-NEXT: nop 75; SPARC64-NEXT: nop 76; SPARC64-NEXT: nop 77; SPARC64-NEXT: nop 78; SPARC64-NEXT: !NO_APP 79; SPARC64-NEXT: ret 80; SPARC64-NEXT: restore %g0, %g0, %o0 81; SPARC64-NEXT: .LBB1_2: ! %true 82; SPARC64-NEXT: mov 4, %i0 83; SPARC64-NEXT: !APP 84; SPARC64-NEXT: nop 85; SPARC64-NEXT: nop 86; SPARC64-NEXT: nop 87; SPARC64-NEXT: nop 88; SPARC64-NEXT: nop 89; SPARC64-NEXT: nop 90; SPARC64-NEXT: nop 91; SPARC64-NEXT: nop 92; SPARC64-NEXT: !NO_APP 93; SPARC64-NEXT: ret 94; SPARC64-NEXT: restore 95 %tst = icmp eq i64 %in, 0 96 br i1 %tst, label %true, label %false 97 98true: 99 call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""() 100 ret i64 4 101 102false: 103 call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""() 104 ret i64 0 105} 106 107define float @branch_relax_float(float %in) { 108; SPARC64-LABEL: branch_relax_float: 109; SPARC64: .cfi_startproc 110; SPARC64-NEXT: ! %bb.0: 111; SPARC64-NEXT: save %sp, -128, %sp 112; SPARC64-NEXT: .cfi_def_cfa_register %fp 113; SPARC64-NEXT: .cfi_window_save 114; SPARC64-NEXT: .cfi_register %o7, %i7 115; SPARC64-NEXT: sethi %h44(.LCPI2_0), %i0 116; SPARC64-NEXT: add %i0, %m44(.LCPI2_0), %i0 117; SPARC64-NEXT: sllx %i0, 12, %i0 118; SPARC64-NEXT: ld [%i0+%l44(.LCPI2_0)], %f0 119; SPARC64-NEXT: fcmps %fcc0, %f1, %f0 120; SPARC64-NEXT: fbe %fcc0, .LBB2_1 121; SPARC64-NEXT: nop 122; SPARC64-NEXT: ba .LBB2_2 123; SPARC64-NEXT: nop 124; SPARC64-NEXT: .LBB2_1: ! %true 125; SPARC64-NEXT: sethi %h44(.LCPI2_1), %i0 126; SPARC64-NEXT: add %i0, %m44(.LCPI2_1), %i0 127; SPARC64-NEXT: sllx %i0, 12, %i0 128; SPARC64-NEXT: ld [%i0+%l44(.LCPI2_1)], %f0 129; SPARC64-NEXT: !APP 130; SPARC64-NEXT: nop 131; SPARC64-NEXT: nop 132; SPARC64-NEXT: nop 133; SPARC64-NEXT: nop 134; SPARC64-NEXT: nop 135; SPARC64-NEXT: nop 136; SPARC64-NEXT: nop 137; SPARC64-NEXT: nop 138; SPARC64-NEXT: !NO_APP 139; SPARC64-NEXT: ret 140; SPARC64-NEXT: restore 141; SPARC64-NEXT: .LBB2_2: ! %false 142; SPARC64-NEXT: !APP 143; SPARC64-NEXT: nop 144; SPARC64-NEXT: nop 145; SPARC64-NEXT: nop 146; SPARC64-NEXT: nop 147; SPARC64-NEXT: nop 148; SPARC64-NEXT: nop 149; SPARC64-NEXT: nop 150; SPARC64-NEXT: nop 151; SPARC64-NEXT: !NO_APP 152; SPARC64-NEXT: ret 153; SPARC64-NEXT: restore 154 %tst = fcmp oeq float %in, 0.0 155 br i1 %tst, label %true, label %false 156 157true: 158 call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""() 159 ret float 4.0 160 161false: 162 call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""() 163 ret float 0.0 164} 165