xref: /llvm-project/llvm/test/CodeGen/SPARC/64atomics.ll (revision 728490257ecc09ada707a0390303bd3c61027a53)
1; RUN: llc < %s -mtriple=sparc -mcpu=v9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC,SPARC32
2; RUN: llc < %s -mtriple=sparcv9 -verify-machineinstrs | FileCheck %s --check-prefixes=SPARC,SPARC64
3
4; SPARC-LABEL: test_atomic_i64
5; SPARC32:       __atomic_load_8
6; SPARC64:       ldx [%o0]
7; SPARC64:       membar
8; SPARC64:       ldx [%o1]
9; SPARC64:       membar
10; SPARC64:       membar
11; SPARC64:       stx {{.+}}, [%o2]
12define i64 @test_atomic_i64(ptr %ptr1, ptr %ptr2, ptr %ptr3) {
13entry:
14  %0 = load atomic i64, ptr %ptr1 acquire, align 8
15  %1 = load atomic i64, ptr %ptr2 acquire, align 8
16  %2 = add i64 %0, %1
17  store atomic i64 %2, ptr %ptr3 release, align 8
18  ret i64 %2
19}
20
21; SPARC-LABEL: test_cmpxchg_i64
22; SPARC32:       __atomic_compare_exchange_8
23; SPARC64:       mov 123, [[R:%[gilo][0-7]]]
24; SPARC64:       casx [%o1], %o0, [[R]]
25
26define i64 @test_cmpxchg_i64(i64 %a, ptr %ptr) {
27entry:
28  %pair = cmpxchg ptr %ptr, i64 %a, i64 123 monotonic monotonic
29  %b = extractvalue { i64, i1 } %pair, 0
30  ret i64 %b
31}
32
33; SPARC-LABEL: test_swap_i64
34; SPARC32:       __atomic_exchange_8
35; SPARC64:       casx [%o1],
36
37define i64 @test_swap_i64(i64 %a, ptr %ptr) {
38entry:
39  %b = atomicrmw xchg ptr %ptr, i64 42 monotonic
40  ret i64 %b
41}
42
43; SPARC-LABEL: test_load_sub_64
44; SPARC32: __atomic_fetch_sub_8
45; SPARC64: membar
46; SPARC64: sub
47; SPARC64: casx [%o0]
48; SPARC64: membar
49define zeroext i64 @test_load_sub_64(ptr %p, i64 zeroext %v) {
50entry:
51  %0 = atomicrmw sub ptr %p, i64 %v seq_cst
52  ret i64 %0
53}
54
55; SPARC-LABEL: test_load_max_64
56; SPARC32: __atomic_compare_exchange_8
57; SPARC64: membar
58; SPARC64: cmp
59; SPARC64: movg %xcc
60; SPARC64: casx [%o0]
61; SPARC64: membar
62define zeroext i64 @test_load_max_64(ptr %p, i64 zeroext %v) {
63entry:
64  %0 = atomicrmw max ptr %p, i64 %v seq_cst
65  ret i64 %0
66}
67