xref: /llvm-project/llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll (revision 9122c5235ec85ce0c0ad337e862b006e7b349d84)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s
3
4define signext i8 @trunc_nsw_add(i32 signext %x) nounwind {
5; CHECK-LABEL: trunc_nsw_add:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    addiw a0, a0, 1
8; CHECK-NEXT:    ret
9entry:
10  %add = add nsw i32 %x, 1
11  %trunc = trunc nsw i32 %add to i8
12  ret i8 %trunc
13}
14
15define signext i32 @trunc_nuw_nsw_urem(i64 %x) nounwind {
16; CHECK-LABEL: trunc_nuw_nsw_urem:
17; CHECK:       # %bb.0: # %entry
18; CHECK-NEXT:    lui a1, 210
19; CHECK-NEXT:    lui a2, 2
20; CHECK-NEXT:    addiw a1, a1, -1167
21; CHECK-NEXT:    slli a1, a1, 12
22; CHECK-NEXT:    addi a1, a1, 1881
23; CHECK-NEXT:    mul a1, a0, a1
24; CHECK-NEXT:    srli a1, a1, 45
25; CHECK-NEXT:    addi a2, a2, 1808
26; CHECK-NEXT:    mul a1, a1, a2
27; CHECK-NEXT:    subw a0, a0, a1
28; CHECK-NEXT:    ret
29entry:
30  %trunc = trunc nuw nsw i64 %x to i32
31  %rem = urem i32 %trunc, 10000
32  ret i32 %rem
33}
34
35define i64 @zext_nneg_udiv_trunc_nuw(i64 %x) nounwind {
36; CHECK-LABEL: zext_nneg_udiv_trunc_nuw:
37; CHECK:       # %bb.0: # %entry
38; CHECK-NEXT:    lui a1, 13
39; CHECK-NEXT:    addi a1, a1, -819
40; CHECK-NEXT:    mul a0, a0, a1
41; CHECK-NEXT:    srliw a0, a0, 23
42; CHECK-NEXT:    ret
43entry:
44  %trunc = trunc nuw i64 %x to i16
45  %div = udiv i16 %trunc, 160
46  %ext = zext nneg i16 %div to i64
47  ret i64 %ext
48}
49
50define i64 @sext_udiv_trunc_nuw(i64 %x) nounwind {
51; CHECK-LABEL: sext_udiv_trunc_nuw:
52; CHECK:       # %bb.0: # %entry
53; CHECK-NEXT:    lui a1, 13
54; CHECK-NEXT:    addi a1, a1, -819
55; CHECK-NEXT:    mul a0, a0, a1
56; CHECK-NEXT:    srliw a0, a0, 23
57; CHECK-NEXT:    ret
58entry:
59  %trunc = trunc nuw i64 %x to i16
60  %div = udiv i16 %trunc, 160
61  %ext = sext i16 %div to i64
62  ret i64 %ext
63}
64
65define ptr @gep_nusw_zext_nneg_add_trunc_nuw_nsw(ptr %p, i64 %x) nounwind {
66; CHECK-LABEL: gep_nusw_zext_nneg_add_trunc_nuw_nsw:
67; CHECK:       # %bb.0: # %entry
68; CHECK-NEXT:    slli a1, a1, 2
69; CHECK-NEXT:    add a0, a1, a0
70; CHECK-NEXT:    addi a0, a0, 20
71; CHECK-NEXT:    ret
72entry:
73  %trunc = trunc nuw nsw i64 %x to i32
74  %add = add nuw nsw i32 %trunc, 5
75  %offset = zext nneg i32 %add to i64
76  %gep = getelementptr nusw float, ptr %p, i64 %offset
77  ret ptr %gep
78}
79