1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 2# RUN: llc %s -mtriple=riscv64 -run-pass=machine-sink -o - | FileCheck %s 3 4--- 5name: main 6tracksRegLiveness: true 7registers: 8 - { id: 0, class: fpr32 } 9 - { id: 1, class: fpr32 } 10 - { id: 2, class: gpr } 11 - { id: 3, class: gpr } 12liveins: 13 - { reg: '$f10_f', virtual-reg: '%0' } 14 - { reg: '$f11_f', virtual-reg: '%1' } 15body: | 16 bb.0.entry: 17 liveins: $f10_f, $f11_f 18 19 ; CHECK-LABEL: name: main 20 ; CHECK: liveins: $f10_f, $f11_f 21 ; CHECK-NEXT: {{ $}} 22 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f11_f 23 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f10_f 24 ; CHECK-NEXT: [[ReadFFLAGS:%[0-9]+]]:gpr = ReadFFLAGS implicit $fflags 25 ; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = nofpexcept FLE_S [[COPY1]], [[COPY]] 26 ; CHECK-NEXT: WriteFFLAGS killed [[ReadFFLAGS]], implicit-def $fflags 27 ; CHECK-NEXT: $x0 = nofpexcept FEQ_S [[COPY1]], [[COPY]] 28 ; CHECK-NEXT: $x10 = COPY [[FLE_S]] 29 ; CHECK-NEXT: PseudoRET implicit $x10 30 %1:fpr32 = COPY $f11_f 31 %0:fpr32 = COPY $f10_f 32 %3:gpr = ReadFFLAGS implicit $fflags 33 %2:gpr = nofpexcept FLE_S %0, %1 34 WriteFFLAGS killed %3, implicit-def $fflags 35 $x0 = nofpexcept FEQ_S %0, %1 36 $x10 = COPY %2 37 PseudoRET implicit $x10 38 39... 40