xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vp-reverse-float-fixed-vectors.ll (revision d8d131dfa99762ccdd2116661980b7d0493cd7b5)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+m,+f,+d,+v -verify-machineinstrs -riscv-v-vector-bits-min=128 \
3; RUN:   < %s | FileCheck %s
4
5define <2 x double> @test_vp_reverse_v2f64_masked(<2 x double> %src, <2 x i1> %mask, i32 zeroext %evl) {
6; CHECK-LABEL: test_vp_reverse_v2f64_masked:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
9; CHECK-NEXT:    vid.v v9, v0.t
10; CHECK-NEXT:    addi a0, a0, -1
11; CHECK-NEXT:    vrsub.vx v10, v9, a0, v0.t
12; CHECK-NEXT:    vrgather.vv v9, v8, v10, v0.t
13; CHECK-NEXT:    vmv.v.v v8, v9
14; CHECK-NEXT:    ret
15  %dst = call <2 x double> @llvm.experimental.vp.reverse.v2f64(<2 x double> %src, <2 x i1> %mask, i32 %evl)
16  ret <2 x double> %dst
17}
18
19define <2 x double> @test_vp_reverse_v2f64(<2 x double> %src, i32 zeroext %evl) {
20; CHECK-LABEL: test_vp_reverse_v2f64:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    addi a1, a0, -1
23; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
24; CHECK-NEXT:    vid.v v9
25; CHECK-NEXT:    vrsub.vx v10, v9, a1
26; CHECK-NEXT:    vrgather.vv v9, v8, v10
27; CHECK-NEXT:    vmv.v.v v8, v9
28; CHECK-NEXT:    ret
29
30  %dst = call <2 x double> @llvm.experimental.vp.reverse.v2f64(<2 x double> %src, <2 x i1> splat (i1 1), i32 %evl)
31  ret <2 x double> %dst
32}
33
34define <4 x float> @test_vp_reverse_v4f32_masked(<4 x float> %src, <4 x i1> %mask, i32 zeroext %evl) {
35; CHECK-LABEL: test_vp_reverse_v4f32_masked:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
38; CHECK-NEXT:    vid.v v9, v0.t
39; CHECK-NEXT:    addi a0, a0, -1
40; CHECK-NEXT:    vrsub.vx v10, v9, a0, v0.t
41; CHECK-NEXT:    vrgather.vv v9, v8, v10, v0.t
42; CHECK-NEXT:    vmv.v.v v8, v9
43; CHECK-NEXT:    ret
44  %dst = call <4 x float> @llvm.experimental.vp.reverse.v4f32(<4 x float> %src, <4 x i1> %mask, i32 %evl)
45  ret <4 x float> %dst
46}
47
48define <4 x float> @test_vp_reverse_v4f32(<4 x float> %src, i32 zeroext %evl) {
49; CHECK-LABEL: test_vp_reverse_v4f32:
50; CHECK:       # %bb.0:
51; CHECK-NEXT:    addi a1, a0, -1
52; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
53; CHECK-NEXT:    vid.v v9
54; CHECK-NEXT:    vrsub.vx v10, v9, a1
55; CHECK-NEXT:    vrgather.vv v9, v8, v10
56; CHECK-NEXT:    vmv.v.v v8, v9
57; CHECK-NEXT:    ret
58
59  %dst = call <4 x float> @llvm.experimental.vp.reverse.v4f32(<4 x float> %src, <4 x i1> splat (i1 1), i32 %evl)
60  ret <4 x float> %dst
61}
62
63declare <2 x double> @llvm.experimental.vp.reverse.v2f64(<2 x double>,<2 x i1>,i32)
64declare <4 x float> @llvm.experimental.vp.reverse.v4f32(<4 x float>,<4 x i1>,i32)
65