xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll (revision 97982a8c605fac7c86d02e641a6cd7898b3ca343) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -target-abi=ilp32 \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+v -target-abi=lp64 \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
6
7; This tests a mix of vmacc and vmadd by using different operand orders to
8; trigger commuting in TwoAddressInstructionPass.
9
10define <vscale x 1 x i8> @vmadd_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i8> %vc) {
11; CHECK-LABEL: vmadd_vv_nxv1i8:
12; CHECK:       # %bb.0:
13; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
14; CHECK-NEXT:    vmadd.vv v8, v9, v10
15; CHECK-NEXT:    ret
16  %x = mul <vscale x 1 x i8> %va, %vb
17  %y = add <vscale x 1 x i8> %x, %vc
18  ret <vscale x 1 x i8> %y
19}
20
21define <vscale x 1 x i8> @vmadd_vx_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, i8 %c) {
22; CHECK-LABEL: vmadd_vx_nxv1i8:
23; CHECK:       # %bb.0:
24; CHECK-NEXT:    vsetvli a1, zero, e8, mf8, ta, ma
25; CHECK-NEXT:    vmadd.vx v8, a0, v9
26; CHECK-NEXT:    ret
27  %head = insertelement <vscale x 1 x i8> poison, i8 %c, i32 0
28  %splat = shufflevector <vscale x 1 x i8> %head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
29  %x = mul <vscale x 1 x i8> %va, %splat
30  %y = add <vscale x 1 x i8> %x, %vb
31  ret <vscale x 1 x i8> %y
32}
33
34define <vscale x 2 x i8> @vmadd_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i8> %vc) {
35; CHECK-LABEL: vmadd_vv_nxv2i8:
36; CHECK:       # %bb.0:
37; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
38; CHECK-NEXT:    vmadd.vv v8, v10, v9
39; CHECK-NEXT:    ret
40  %x = mul <vscale x 2 x i8> %va, %vc
41  %y = add <vscale x 2 x i8> %x, %vb
42  ret <vscale x 2 x i8> %y
43}
44
45define <vscale x 2 x i8> @vmadd_vx_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, i8 %c) {
46; CHECK-LABEL: vmadd_vx_nxv2i8:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    vsetvli a1, zero, e8, mf4, ta, ma
49; CHECK-NEXT:    vmacc.vx v8, a0, v9
50; CHECK-NEXT:    ret
51  %head = insertelement <vscale x 2 x i8> poison, i8 %c, i32 0
52  %splat = shufflevector <vscale x 2 x i8> %head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
53  %x = mul <vscale x 2 x i8> %vb, %splat
54  %y = add <vscale x 2 x i8> %x, %va
55  ret <vscale x 2 x i8> %y
56}
57
58define <vscale x 4 x i8> @vmadd_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i8> %vc) {
59; CHECK-LABEL: vmadd_vv_nxv4i8:
60; CHECK:       # %bb.0:
61; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
62; CHECK-NEXT:    vmadd.vv v8, v9, v10
63; CHECK-NEXT:    ret
64  %x = mul <vscale x 4 x i8> %vb, %va
65  %y = add <vscale x 4 x i8> %x, %vc
66  ret <vscale x 4 x i8> %y
67}
68
69define <vscale x 4 x i8> @vmadd_vx_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, i8 %c) {
70; CHECK-LABEL: vmadd_vx_nxv4i8:
71; CHECK:       # %bb.0:
72; CHECK-NEXT:    vsetvli a1, zero, e8, mf2, ta, ma
73; CHECK-NEXT:    vmadd.vx v8, a0, v9
74; CHECK-NEXT:    ret
75  %head = insertelement <vscale x 4 x i8> poison, i8 %c, i32 0
76  %splat = shufflevector <vscale x 4 x i8> %head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
77  %x = mul <vscale x 4 x i8> %va, %splat
78  %y = add <vscale x 4 x i8> %x, %vb
79  ret <vscale x 4 x i8> %y
80}
81
82define <vscale x 8 x i8> @vmadd_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i8> %vc) {
83; CHECK-LABEL: vmadd_vv_nxv8i8:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
86; CHECK-NEXT:    vmacc.vv v8, v10, v9
87; CHECK-NEXT:    ret
88  %x = mul <vscale x 8 x i8> %vb, %vc
89  %y = add <vscale x 8 x i8> %x, %va
90  ret <vscale x 8 x i8> %y
91}
92
93define <vscale x 8 x i8> @vmadd_vx_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, i8 %c) {
94; CHECK-LABEL: vmadd_vx_nxv8i8:
95; CHECK:       # %bb.0:
96; CHECK-NEXT:    vsetvli a1, zero, e8, m1, ta, ma
97; CHECK-NEXT:    vmacc.vx v8, a0, v9
98; CHECK-NEXT:    ret
99  %head = insertelement <vscale x 8 x i8> poison, i8 %c, i32 0
100  %splat = shufflevector <vscale x 8 x i8> %head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
101  %x = mul <vscale x 8 x i8> %vb, %splat
102  %y = add <vscale x 8 x i8> %x, %va
103  ret <vscale x 8 x i8> %y
104}
105
106define <vscale x 16 x i8> @vmadd_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i8> %vc) {
107; CHECK-LABEL: vmadd_vv_nxv16i8:
108; CHECK:       # %bb.0:
109; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
110; CHECK-NEXT:    vmadd.vv v8, v12, v10
111; CHECK-NEXT:    ret
112  %x = mul <vscale x 16 x i8> %vc, %va
113  %y = add <vscale x 16 x i8> %x, %vb
114  ret <vscale x 16 x i8> %y
115}
116
117define <vscale x 16 x i8> @vmadd_vx_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, i8 %c) {
118; CHECK-LABEL: vmadd_vx_nxv16i8:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    vsetvli a1, zero, e8, m2, ta, ma
121; CHECK-NEXT:    vmadd.vx v8, a0, v10
122; CHECK-NEXT:    ret
123  %head = insertelement <vscale x 16 x i8> poison, i8 %c, i32 0
124  %splat = shufflevector <vscale x 16 x i8> %head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
125  %x = mul <vscale x 16 x i8> %va, %splat
126  %y = add <vscale x 16 x i8> %x, %vb
127  ret <vscale x 16 x i8> %y
128}
129
130define <vscale x 32 x i8> @vmadd_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i8> %vc) {
131; CHECK-LABEL: vmadd_vv_nxv32i8:
132; CHECK:       # %bb.0:
133; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
134; CHECK-NEXT:    vmacc.vv v8, v16, v12
135; CHECK-NEXT:    ret
136  %x = mul <vscale x 32 x i8> %vc, %vb
137  %y = add <vscale x 32 x i8> %x, %va
138  ret <vscale x 32 x i8> %y
139}
140
141define <vscale x 32 x i8> @vmadd_vx_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, i8 %c) {
142; CHECK-LABEL: vmadd_vx_nxv32i8:
143; CHECK:       # %bb.0:
144; CHECK-NEXT:    vsetvli a1, zero, e8, m4, ta, ma
145; CHECK-NEXT:    vmacc.vx v8, a0, v12
146; CHECK-NEXT:    ret
147  %head = insertelement <vscale x 32 x i8> poison, i8 %c, i32 0
148  %splat = shufflevector <vscale x 32 x i8> %head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
149  %x = mul <vscale x 32 x i8> %vb, %splat
150  %y = add <vscale x 32 x i8> %x, %va
151  ret <vscale x 32 x i8> %y
152}
153
154define <vscale x 64 x i8> @vmadd_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i8> %vc) {
155; CHECK-LABEL: vmadd_vv_nxv64i8:
156; CHECK:       # %bb.0:
157; CHECK-NEXT:    vl8r.v v24, (a0)
158; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
159; CHECK-NEXT:    vmacc.vv v8, v16, v24
160; CHECK-NEXT:    ret
161  %x = mul <vscale x 64 x i8> %vc, %vb
162  %y = add <vscale x 64 x i8> %x, %va
163  ret <vscale x 64 x i8> %y
164}
165
166define <vscale x 64 x i8> @vmadd_vx_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, i8 %c) {
167; CHECK-LABEL: vmadd_vx_nxv64i8:
168; CHECK:       # %bb.0:
169; CHECK-NEXT:    vsetvli a1, zero, e8, m8, ta, ma
170; CHECK-NEXT:    vmacc.vx v8, a0, v16
171; CHECK-NEXT:    ret
172  %head = insertelement <vscale x 64 x i8> poison, i8 %c, i32 0
173  %splat = shufflevector <vscale x 64 x i8> %head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
174  %x = mul <vscale x 64 x i8> %vb, %splat
175  %y = add <vscale x 64 x i8> %x, %va
176  ret <vscale x 64 x i8> %y
177}
178
179define <vscale x 1 x i16> @vmadd_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i16> %vc) {
180; CHECK-LABEL: vmadd_vv_nxv1i16:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
183; CHECK-NEXT:    vmadd.vv v8, v9, v10
184; CHECK-NEXT:    ret
185  %x = mul <vscale x 1 x i16> %va, %vb
186  %y = add <vscale x 1 x i16> %x, %vc
187  ret <vscale x 1 x i16> %y
188}
189
190define <vscale x 1 x i16> @vmadd_vx_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, i16 %c) {
191; CHECK-LABEL: vmadd_vx_nxv1i16:
192; CHECK:       # %bb.0:
193; CHECK-NEXT:    vsetvli a1, zero, e16, mf4, ta, ma
194; CHECK-NEXT:    vmadd.vx v8, a0, v9
195; CHECK-NEXT:    ret
196  %head = insertelement <vscale x 1 x i16> poison, i16 %c, i32 0
197  %splat = shufflevector <vscale x 1 x i16> %head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
198  %x = mul <vscale x 1 x i16> %va, %splat
199  %y = add <vscale x 1 x i16> %x, %vb
200  ret <vscale x 1 x i16> %y
201}
202
203define <vscale x 2 x i16> @vmadd_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i16> %vc) {
204; CHECK-LABEL: vmadd_vv_nxv2i16:
205; CHECK:       # %bb.0:
206; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
207; CHECK-NEXT:    vmadd.vv v8, v10, v9
208; CHECK-NEXT:    ret
209  %x = mul <vscale x 2 x i16> %va, %vc
210  %y = add <vscale x 2 x i16> %x, %vb
211  ret <vscale x 2 x i16> %y
212}
213
214define <vscale x 2 x i16> @vmadd_vx_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, i16 %c) {
215; CHECK-LABEL: vmadd_vx_nxv2i16:
216; CHECK:       # %bb.0:
217; CHECK-NEXT:    vsetvli a1, zero, e16, mf2, ta, ma
218; CHECK-NEXT:    vmacc.vx v8, a0, v9
219; CHECK-NEXT:    ret
220  %head = insertelement <vscale x 2 x i16> poison, i16 %c, i32 0
221  %splat = shufflevector <vscale x 2 x i16> %head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
222  %x = mul <vscale x 2 x i16> %vb, %splat
223  %y = add <vscale x 2 x i16> %x, %va
224  ret <vscale x 2 x i16> %y
225}
226
227define <vscale x 4 x i16> @vmadd_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i16> %vc) {
228; CHECK-LABEL: vmadd_vv_nxv4i16:
229; CHECK:       # %bb.0:
230; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
231; CHECK-NEXT:    vmadd.vv v8, v9, v10
232; CHECK-NEXT:    ret
233  %x = mul <vscale x 4 x i16> %vb, %va
234  %y = add <vscale x 4 x i16> %x, %vc
235  ret <vscale x 4 x i16> %y
236}
237
238define <vscale x 4 x i16> @vmadd_vx_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, i16 %c) {
239; CHECK-LABEL: vmadd_vx_nxv4i16:
240; CHECK:       # %bb.0:
241; CHECK-NEXT:    vsetvli a1, zero, e16, m1, ta, ma
242; CHECK-NEXT:    vmadd.vx v8, a0, v9
243; CHECK-NEXT:    ret
244  %head = insertelement <vscale x 4 x i16> poison, i16 %c, i32 0
245  %splat = shufflevector <vscale x 4 x i16> %head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
246  %x = mul <vscale x 4 x i16> %va, %splat
247  %y = add <vscale x 4 x i16> %x, %vb
248  ret <vscale x 4 x i16> %y
249}
250
251define <vscale x 8 x i16> @vmadd_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i16> %vc) {
252; CHECK-LABEL: vmadd_vv_nxv8i16:
253; CHECK:       # %bb.0:
254; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
255; CHECK-NEXT:    vmacc.vv v8, v12, v10
256; CHECK-NEXT:    ret
257  %x = mul <vscale x 8 x i16> %vb, %vc
258  %y = add <vscale x 8 x i16> %x, %va
259  ret <vscale x 8 x i16> %y
260}
261
262define <vscale x 8 x i16> @vmadd_vx_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, i16 %c) {
263; CHECK-LABEL: vmadd_vx_nxv8i16:
264; CHECK:       # %bb.0:
265; CHECK-NEXT:    vsetvli a1, zero, e16, m2, ta, ma
266; CHECK-NEXT:    vmacc.vx v8, a0, v10
267; CHECK-NEXT:    ret
268  %head = insertelement <vscale x 8 x i16> poison, i16 %c, i32 0
269  %splat = shufflevector <vscale x 8 x i16> %head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
270  %x = mul <vscale x 8 x i16> %vb, %splat
271  %y = add <vscale x 8 x i16> %x, %va
272  ret <vscale x 8 x i16> %y
273}
274
275define <vscale x 16 x i16> @vmadd_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i16> %vc) {
276; CHECK-LABEL: vmadd_vv_nxv16i16:
277; CHECK:       # %bb.0:
278; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
279; CHECK-NEXT:    vmadd.vv v8, v16, v12
280; CHECK-NEXT:    ret
281  %x = mul <vscale x 16 x i16> %vc, %va
282  %y = add <vscale x 16 x i16> %x, %vb
283  ret <vscale x 16 x i16> %y
284}
285
286define <vscale x 16 x i16> @vmadd_vx_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, i16 %c) {
287; CHECK-LABEL: vmadd_vx_nxv16i16:
288; CHECK:       # %bb.0:
289; CHECK-NEXT:    vsetvli a1, zero, e16, m4, ta, ma
290; CHECK-NEXT:    vmadd.vx v8, a0, v12
291; CHECK-NEXT:    ret
292  %head = insertelement <vscale x 16 x i16> poison, i16 %c, i32 0
293  %splat = shufflevector <vscale x 16 x i16> %head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
294  %x = mul <vscale x 16 x i16> %va, %splat
295  %y = add <vscale x 16 x i16> %x, %vb
296  ret <vscale x 16 x i16> %y
297}
298
299define <vscale x 32 x i16> @vmadd_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i16> %vc) {
300; CHECK-LABEL: vmadd_vv_nxv32i16:
301; CHECK:       # %bb.0:
302; CHECK-NEXT:    vl8re16.v v24, (a0)
303; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
304; CHECK-NEXT:    vmacc.vv v8, v16, v24
305; CHECK-NEXT:    ret
306  %x = mul <vscale x 32 x i16> %vc, %vb
307  %y = add <vscale x 32 x i16> %x, %va
308  ret <vscale x 32 x i16> %y
309}
310
311define <vscale x 32 x i16> @vmadd_vx_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, i16 %c) {
312; CHECK-LABEL: vmadd_vx_nxv32i16:
313; CHECK:       # %bb.0:
314; CHECK-NEXT:    vsetvli a1, zero, e16, m8, ta, ma
315; CHECK-NEXT:    vmacc.vx v8, a0, v16
316; CHECK-NEXT:    ret
317  %head = insertelement <vscale x 32 x i16> poison, i16 %c, i32 0
318  %splat = shufflevector <vscale x 32 x i16> %head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
319  %x = mul <vscale x 32 x i16> %vb, %splat
320  %y = add <vscale x 32 x i16> %x, %va
321  ret <vscale x 32 x i16> %y
322}
323
324define <vscale x 1 x i32> @vmadd_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i32> %vc) {
325; CHECK-LABEL: vmadd_vv_nxv1i32:
326; CHECK:       # %bb.0:
327; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
328; CHECK-NEXT:    vmadd.vv v8, v9, v10
329; CHECK-NEXT:    ret
330  %x = mul <vscale x 1 x i32> %va, %vb
331  %y = add <vscale x 1 x i32> %x, %vc
332  ret <vscale x 1 x i32> %y
333}
334
335define <vscale x 1 x i32> @vmadd_vx_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, i32 %c) {
336; CHECK-LABEL: vmadd_vx_nxv1i32:
337; CHECK:       # %bb.0:
338; CHECK-NEXT:    vsetvli a1, zero, e32, mf2, ta, ma
339; CHECK-NEXT:    vmadd.vx v8, a0, v9
340; CHECK-NEXT:    ret
341  %head = insertelement <vscale x 1 x i32> poison, i32 %c, i32 0
342  %splat = shufflevector <vscale x 1 x i32> %head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
343  %x = mul <vscale x 1 x i32> %va, %splat
344  %y = add <vscale x 1 x i32> %x, %vb
345  ret <vscale x 1 x i32> %y
346}
347
348define <vscale x 2 x i32> @vmadd_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i32> %vc) {
349; CHECK-LABEL: vmadd_vv_nxv2i32:
350; CHECK:       # %bb.0:
351; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
352; CHECK-NEXT:    vmadd.vv v8, v10, v9
353; CHECK-NEXT:    ret
354  %x = mul <vscale x 2 x i32> %va, %vc
355  %y = add <vscale x 2 x i32> %x, %vb
356  ret <vscale x 2 x i32> %y
357}
358
359define <vscale x 2 x i32> @vmadd_vx_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, i32 %c) {
360; CHECK-LABEL: vmadd_vx_nxv2i32:
361; CHECK:       # %bb.0:
362; CHECK-NEXT:    vsetvli a1, zero, e32, m1, ta, ma
363; CHECK-NEXT:    vmacc.vx v8, a0, v9
364; CHECK-NEXT:    ret
365  %head = insertelement <vscale x 2 x i32> poison, i32 %c, i32 0
366  %splat = shufflevector <vscale x 2 x i32> %head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
367  %x = mul <vscale x 2 x i32> %vb, %splat
368  %y = add <vscale x 2 x i32> %x, %va
369  ret <vscale x 2 x i32> %y
370}
371
372define <vscale x 4 x i32> @vmadd_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i32> %vc) {
373; CHECK-LABEL: vmadd_vv_nxv4i32:
374; CHECK:       # %bb.0:
375; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
376; CHECK-NEXT:    vmadd.vv v8, v10, v12
377; CHECK-NEXT:    ret
378  %x = mul <vscale x 4 x i32> %vb, %va
379  %y = add <vscale x 4 x i32> %x, %vc
380  ret <vscale x 4 x i32> %y
381}
382
383define <vscale x 4 x i32> @vmadd_vx_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, i32 %c) {
384; CHECK-LABEL: vmadd_vx_nxv4i32:
385; CHECK:       # %bb.0:
386; CHECK-NEXT:    vsetvli a1, zero, e32, m2, ta, ma
387; CHECK-NEXT:    vmadd.vx v8, a0, v10
388; CHECK-NEXT:    ret
389  %head = insertelement <vscale x 4 x i32> poison, i32 %c, i32 0
390  %splat = shufflevector <vscale x 4 x i32> %head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
391  %x = mul <vscale x 4 x i32> %va, %splat
392  %y = add <vscale x 4 x i32> %x, %vb
393  ret <vscale x 4 x i32> %y
394}
395
396define <vscale x 8 x i32> @vmadd_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i32> %vc) {
397; CHECK-LABEL: vmadd_vv_nxv8i32:
398; CHECK:       # %bb.0:
399; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
400; CHECK-NEXT:    vmacc.vv v8, v16, v12
401; CHECK-NEXT:    ret
402  %x = mul <vscale x 8 x i32> %vb, %vc
403  %y = add <vscale x 8 x i32> %x, %va
404  ret <vscale x 8 x i32> %y
405}
406
407define <vscale x 8 x i32> @vmadd_vx_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, i32 %c) {
408; CHECK-LABEL: vmadd_vx_nxv8i32:
409; CHECK:       # %bb.0:
410; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
411; CHECK-NEXT:    vmacc.vx v8, a0, v12
412; CHECK-NEXT:    ret
413  %head = insertelement <vscale x 8 x i32> poison, i32 %c, i32 0
414  %splat = shufflevector <vscale x 8 x i32> %head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
415  %x = mul <vscale x 8 x i32> %vb, %splat
416  %y = add <vscale x 8 x i32> %x, %va
417  ret <vscale x 8 x i32> %y
418}
419
420define <vscale x 16 x i32> @vmadd_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i32> %vc) {
421; CHECK-LABEL: vmadd_vv_nxv16i32:
422; CHECK:       # %bb.0:
423; CHECK-NEXT:    vl8re32.v v24, (a0)
424; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
425; CHECK-NEXT:    vmadd.vv v8, v24, v16
426; CHECK-NEXT:    ret
427  %x = mul <vscale x 16 x i32> %vc, %va
428  %y = add <vscale x 16 x i32> %x, %vb
429  ret <vscale x 16 x i32> %y
430}
431
432define <vscale x 16 x i32> @vmadd_vx_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, i32 %c) {
433; CHECK-LABEL: vmadd_vx_nxv16i32:
434; CHECK:       # %bb.0:
435; CHECK-NEXT:    vsetvli a1, zero, e32, m8, ta, ma
436; CHECK-NEXT:    vmadd.vx v8, a0, v16
437; CHECK-NEXT:    ret
438  %head = insertelement <vscale x 16 x i32> poison, i32 %c, i32 0
439  %splat = shufflevector <vscale x 16 x i32> %head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
440  %x = mul <vscale x 16 x i32> %va, %splat
441  %y = add <vscale x 16 x i32> %x, %vb
442  ret <vscale x 16 x i32> %y
443}
444
445define <vscale x 1 x i64> @vmadd_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i64> %vc) {
446; CHECK-LABEL: vmadd_vv_nxv1i64:
447; CHECK:       # %bb.0:
448; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
449; CHECK-NEXT:    vmadd.vv v8, v9, v10
450; CHECK-NEXT:    ret
451  %x = mul <vscale x 1 x i64> %va, %vb
452  %y = add <vscale x 1 x i64> %x, %vc
453  ret <vscale x 1 x i64> %y
454}
455
456define <vscale x 1 x i64> @vmadd_vx_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, i64 %c) {
457; RV32-LABEL: vmadd_vx_nxv1i64:
458; RV32:       # %bb.0:
459; RV32-NEXT:    addi sp, sp, -16
460; RV32-NEXT:    .cfi_def_cfa_offset 16
461; RV32-NEXT:    sw a0, 8(sp)
462; RV32-NEXT:    sw a1, 12(sp)
463; RV32-NEXT:    addi a0, sp, 8
464; RV32-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
465; RV32-NEXT:    vlse64.v v10, (a0), zero
466; RV32-NEXT:    vmadd.vv v8, v10, v9
467; RV32-NEXT:    addi sp, sp, 16
468; RV32-NEXT:    .cfi_def_cfa_offset 0
469; RV32-NEXT:    ret
470;
471; RV64-LABEL: vmadd_vx_nxv1i64:
472; RV64:       # %bb.0:
473; RV64-NEXT:    vsetvli a1, zero, e64, m1, ta, ma
474; RV64-NEXT:    vmadd.vx v8, a0, v9
475; RV64-NEXT:    ret
476  %head = insertelement <vscale x 1 x i64> poison, i64 %c, i32 0
477  %splat = shufflevector <vscale x 1 x i64> %head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
478  %x = mul <vscale x 1 x i64> %va, %splat
479  %y = add <vscale x 1 x i64> %x, %vb
480  ret <vscale x 1 x i64> %y
481}
482
483define <vscale x 2 x i64> @vmadd_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i64> %vc) {
484; CHECK-LABEL: vmadd_vv_nxv2i64:
485; CHECK:       # %bb.0:
486; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
487; CHECK-NEXT:    vmadd.vv v8, v12, v10
488; CHECK-NEXT:    ret
489  %x = mul <vscale x 2 x i64> %va, %vc
490  %y = add <vscale x 2 x i64> %x, %vb
491  ret <vscale x 2 x i64> %y
492}
493
494define <vscale x 2 x i64> @vmadd_vx_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, i64 %c) {
495; RV32-LABEL: vmadd_vx_nxv2i64:
496; RV32:       # %bb.0:
497; RV32-NEXT:    addi sp, sp, -16
498; RV32-NEXT:    .cfi_def_cfa_offset 16
499; RV32-NEXT:    sw a0, 8(sp)
500; RV32-NEXT:    sw a1, 12(sp)
501; RV32-NEXT:    addi a0, sp, 8
502; RV32-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
503; RV32-NEXT:    vlse64.v v12, (a0), zero
504; RV32-NEXT:    vmacc.vv v8, v10, v12
505; RV32-NEXT:    addi sp, sp, 16
506; RV32-NEXT:    .cfi_def_cfa_offset 0
507; RV32-NEXT:    ret
508;
509; RV64-LABEL: vmadd_vx_nxv2i64:
510; RV64:       # %bb.0:
511; RV64-NEXT:    vsetvli a1, zero, e64, m2, ta, ma
512; RV64-NEXT:    vmacc.vx v8, a0, v10
513; RV64-NEXT:    ret
514  %head = insertelement <vscale x 2 x i64> poison, i64 %c, i32 0
515  %splat = shufflevector <vscale x 2 x i64> %head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
516  %x = mul <vscale x 2 x i64> %vb, %splat
517  %y = add <vscale x 2 x i64> %x, %va
518  ret <vscale x 2 x i64> %y
519}
520
521define <vscale x 4 x i64> @vmadd_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i64> %vc) {
522; CHECK-LABEL: vmadd_vv_nxv4i64:
523; CHECK:       # %bb.0:
524; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
525; CHECK-NEXT:    vmadd.vv v8, v12, v16
526; CHECK-NEXT:    ret
527  %x = mul <vscale x 4 x i64> %vb, %va
528  %y = add <vscale x 4 x i64> %x, %vc
529  ret <vscale x 4 x i64> %y
530}
531
532define <vscale x 4 x i64> @vmadd_vx_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, i64 %c) {
533; RV32-LABEL: vmadd_vx_nxv4i64:
534; RV32:       # %bb.0:
535; RV32-NEXT:    addi sp, sp, -16
536; RV32-NEXT:    .cfi_def_cfa_offset 16
537; RV32-NEXT:    sw a0, 8(sp)
538; RV32-NEXT:    sw a1, 12(sp)
539; RV32-NEXT:    addi a0, sp, 8
540; RV32-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
541; RV32-NEXT:    vlse64.v v16, (a0), zero
542; RV32-NEXT:    vmadd.vv v8, v16, v12
543; RV32-NEXT:    addi sp, sp, 16
544; RV32-NEXT:    .cfi_def_cfa_offset 0
545; RV32-NEXT:    ret
546;
547; RV64-LABEL: vmadd_vx_nxv4i64:
548; RV64:       # %bb.0:
549; RV64-NEXT:    vsetvli a1, zero, e64, m4, ta, ma
550; RV64-NEXT:    vmadd.vx v8, a0, v12
551; RV64-NEXT:    ret
552  %head = insertelement <vscale x 4 x i64> poison, i64 %c, i32 0
553  %splat = shufflevector <vscale x 4 x i64> %head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
554  %x = mul <vscale x 4 x i64> %va, %splat
555  %y = add <vscale x 4 x i64> %x, %vb
556  ret <vscale x 4 x i64> %y
557}
558
559define <vscale x 8 x i64> @vmadd_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i64> %vc) {
560; CHECK-LABEL: vmadd_vv_nxv8i64:
561; CHECK:       # %bb.0:
562; CHECK-NEXT:    vl8re64.v v24, (a0)
563; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
564; CHECK-NEXT:    vmacc.vv v8, v16, v24
565; CHECK-NEXT:    ret
566  %x = mul <vscale x 8 x i64> %vb, %vc
567  %y = add <vscale x 8 x i64> %x, %va
568  ret <vscale x 8 x i64> %y
569}
570
571define <vscale x 8 x i64> @vmadd_vx_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, i64 %c) {
572; RV32-LABEL: vmadd_vx_nxv8i64:
573; RV32:       # %bb.0:
574; RV32-NEXT:    addi sp, sp, -16
575; RV32-NEXT:    .cfi_def_cfa_offset 16
576; RV32-NEXT:    sw a0, 8(sp)
577; RV32-NEXT:    sw a1, 12(sp)
578; RV32-NEXT:    addi a0, sp, 8
579; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
580; RV32-NEXT:    vlse64.v v24, (a0), zero
581; RV32-NEXT:    vmacc.vv v8, v16, v24
582; RV32-NEXT:    addi sp, sp, 16
583; RV32-NEXT:    .cfi_def_cfa_offset 0
584; RV32-NEXT:    ret
585;
586; RV64-LABEL: vmadd_vx_nxv8i64:
587; RV64:       # %bb.0:
588; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, ma
589; RV64-NEXT:    vmacc.vx v8, a0, v16
590; RV64-NEXT:    ret
591  %head = insertelement <vscale x 8 x i64> poison, i64 %c, i32 0
592  %splat = shufflevector <vscale x 8 x i64> %head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
593  %x = mul <vscale x 8 x i64> %vb, %splat
594  %y = add <vscale x 8 x i64> %x, %va
595  ret <vscale x 8 x i64> %y
596}
597
598define <vscale x 4 x i32> @combine_mul_add_imm1(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
599; CHECK-LABEL: combine_mul_add_imm1:
600; CHECK:       # %bb.0:
601; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
602; CHECK-NEXT:    vmadd.vv v8, v10, v10
603; CHECK-NEXT:    ret
604  %x = add <vscale x 4 x i32> %a, splat (i32 1)
605  %y = mul <vscale x 4 x i32> %x, %b
606  ret <vscale x 4 x i32> %y
607}
608
609define <vscale x 4 x i32> @combine_mul_add_imm1_2(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
610; CHECK-LABEL: combine_mul_add_imm1_2:
611; CHECK:       # %bb.0:
612; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
613; CHECK-NEXT:    vmadd.vv v8, v10, v10
614; CHECK-NEXT:    ret
615  %x = add <vscale x 4 x i32> %a, splat (i32 1)
616  %y = mul <vscale x 4 x i32> %b, %x
617  ret <vscale x 4 x i32> %y
618}
619