1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc -mtriple=riscv64 -mattr=+v < %s | FileCheck %s 3 4; Testing VFIRST patterns related to llvm/test/Transforms/LoopIdiom/RISCV/byte-compare-index.ll 5 6define i32 @compare_bytes_simple(ptr %a, ptr %b, i32 signext %len, i32 signext %n) { 7; CHECK-LABEL: compare_bytes_simple: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: addiw a5, a2, 1 10; CHECK-NEXT: bltu a3, a5, .LBB0_7 11; CHECK-NEXT: # %bb.1: # %mismatch_mem_check 12; CHECK-NEXT: slli a2, a5, 32 13; CHECK-NEXT: slli a4, a3, 32 14; CHECK-NEXT: srli a2, a2, 32 15; CHECK-NEXT: srli a4, a4, 32 16; CHECK-NEXT: add a6, a0, a2 17; CHECK-NEXT: add a7, a0, a4 18; CHECK-NEXT: srli a6, a6, 12 19; CHECK-NEXT: srli a7, a7, 12 20; CHECK-NEXT: bne a6, a7, .LBB0_7 21; CHECK-NEXT: # %bb.2: # %mismatch_mem_check 22; CHECK-NEXT: add a6, a1, a2 23; CHECK-NEXT: add a7, a1, a4 24; CHECK-NEXT: srli a6, a6, 12 25; CHECK-NEXT: srli a7, a7, 12 26; CHECK-NEXT: bne a6, a7, .LBB0_7 27; CHECK-NEXT: .LBB0_3: # %mismatch_vec_loop 28; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 29; CHECK-NEXT: sub a5, a4, a2 30; CHECK-NEXT: add a6, a0, a2 31; CHECK-NEXT: add a7, a1, a2 32; CHECK-NEXT: vsetvli a5, a5, e8, m2, ta, ma 33; CHECK-NEXT: vle8.v v8, (a6) 34; CHECK-NEXT: vle8.v v10, (a7) 35; CHECK-NEXT: vmsne.vv v12, v8, v10 36; CHECK-NEXT: vfirst.m a7, v12 37; CHECK-NEXT: mv a6, a5 38; CHECK-NEXT: bltz a7, .LBB0_5 39; CHECK-NEXT: # %bb.4: # %mismatch_vec_loop 40; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1 41; CHECK-NEXT: mv a6, a7 42; CHECK-NEXT: .LBB0_5: # %mismatch_vec_loop 43; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1 44; CHECK-NEXT: sext.w a7, a6 45; CHECK-NEXT: bne a7, a5, .LBB0_11 46; CHECK-NEXT: # %bb.6: # %mismatch_vec_loop_inc 47; CHECK-NEXT: # in Loop: Header=BB0_3 Depth=1 48; CHECK-NEXT: add a2, a2, a5 49; CHECK-NEXT: bne a2, a4, .LBB0_3 50; CHECK-NEXT: j .LBB0_9 51; CHECK-NEXT: .LBB0_7: # %mismatch_loop 52; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 53; CHECK-NEXT: slli a2, a5, 32 54; CHECK-NEXT: srli a2, a2, 32 55; CHECK-NEXT: add a4, a0, a2 56; CHECK-NEXT: add a2, a1, a2 57; CHECK-NEXT: lbu a4, 0(a4) 58; CHECK-NEXT: lbu a2, 0(a2) 59; CHECK-NEXT: bne a4, a2, .LBB0_10 60; CHECK-NEXT: # %bb.8: # %mismatch_loop_inc 61; CHECK-NEXT: # in Loop: Header=BB0_7 Depth=1 62; CHECK-NEXT: addiw a5, a5, 1 63; CHECK-NEXT: bne a3, a5, .LBB0_7 64; CHECK-NEXT: .LBB0_9: # %while.end 65; CHECK-NEXT: mv a0, a3 66; CHECK-NEXT: ret 67; CHECK-NEXT: .LBB0_10: 68; CHECK-NEXT: mv a0, a5 69; CHECK-NEXT: ret 70; CHECK-NEXT: .LBB0_11: # %mismatch_vec_loop_found 71; CHECK-NEXT: slli a6, a6, 32 72; CHECK-NEXT: srli a3, a6, 32 73; CHECK-NEXT: add a0, a2, a3 74; CHECK-NEXT: ret 75entry: 76 %0 = add i32 %len, 1 77 br label %mismatch_min_it_check 78 79mismatch_min_it_check: ; preds = %entry 80 %1 = zext i32 %0 to i64 81 %2 = zext i32 %n to i64 82 %3 = icmp ule i32 %0, %n 83 br i1 %3, label %mismatch_mem_check, label %mismatch_loop_pre 84 85mismatch_mem_check: ; preds = %mismatch_min_it_check 86 %4 = getelementptr i8, ptr %a, i64 %1 87 %5 = getelementptr i8, ptr %b, i64 %1 88 %6 = ptrtoint ptr %5 to i64 89 %7 = ptrtoint ptr %4 to i64 90 %8 = getelementptr i8, ptr %a, i64 %2 91 %9 = getelementptr i8, ptr %b, i64 %2 92 %10 = ptrtoint ptr %8 to i64 93 %11 = ptrtoint ptr %9 to i64 94 %12 = lshr i64 %7, 12 95 %13 = lshr i64 %10, 12 96 %14 = lshr i64 %6, 12 97 %15 = lshr i64 %11, 12 98 %16 = icmp ne i64 %12, %13 99 %17 = icmp ne i64 %14, %15 100 %18 = or i1 %16, %17 101 br i1 %18, label %mismatch_loop_pre, label %mismatch_vec_loop_preheader 102 103mismatch_vec_loop_preheader: ; preds = %mismatch_mem_check 104 br label %mismatch_vec_loop 105 106mismatch_vec_loop: ; preds = %mismatch_vec_loop_inc, %mismatch_vec_loop_preheader 107 %mismatch_vector_index = phi i64 [ %1, %mismatch_vec_loop_preheader ], [ %25, %mismatch_vec_loop_inc ] 108 %avl = sub nuw nsw i64 %2, %mismatch_vector_index 109 %19 = call i32 @llvm.experimental.get.vector.length.i64(i64 %avl, i32 16, i1 true) 110 %20 = getelementptr inbounds i8, ptr %a, i64 %mismatch_vector_index 111 %lhs.load = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr %20, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19) 112 %21 = getelementptr inbounds i8, ptr %b, i64 %mismatch_vector_index 113 %rhs.load = call <vscale x 16 x i8> @llvm.vp.load.nxv16i8.p0(ptr %21, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19) 114 %mismatch.cmp = call <vscale x 16 x i1> @llvm.vp.icmp.nxv16i8(<vscale x 16 x i8> %lhs.load, <vscale x 16 x i8> %rhs.load, metadata !"ne", <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19) 115 %22 = call i32 @llvm.vp.cttz.elts.i32.nxv16i1(<vscale x 16 x i1> %mismatch.cmp, i1 false, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i64 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i32 %19) 116 %23 = icmp ne i32 %22, %19 117 br i1 %23, label %mismatch_vec_loop_found, label %mismatch_vec_loop_inc 118 119mismatch_vec_loop_inc: ; preds = %mismatch_vec_loop 120 %24 = zext i32 %19 to i64 121 %25 = add nuw nsw i64 %mismatch_vector_index, %24 122 %26 = icmp ne i64 %25, %2 123 br i1 %26, label %mismatch_vec_loop, label %mismatch_end 124 125mismatch_vec_loop_found: ; preds = %mismatch_vec_loop 126 %ctz = phi i32 [ %22, %mismatch_vec_loop ] 127 %mismatch_vector_index1 = phi i64 [ %mismatch_vector_index, %mismatch_vec_loop ] 128 %27 = zext i32 %ctz to i64 129 %28 = add nuw nsw i64 %mismatch_vector_index1, %27 130 %29 = trunc i64 %28 to i32 131 br label %mismatch_end 132 133mismatch_loop_pre: ; preds = %mismatch_mem_check, %mismatch_min_it_check 134 br label %mismatch_loop 135 136mismatch_loop: ; preds = %mismatch_loop_inc, %mismatch_loop_pre 137 %mismatch_index = phi i32 [ %0, %mismatch_loop_pre ], [ %36, %mismatch_loop_inc ] 138 %30 = zext i32 %mismatch_index to i64 139 %31 = getelementptr inbounds i8, ptr %a, i64 %30 140 %32 = load i8, ptr %31, align 1 141 %33 = getelementptr inbounds i8, ptr %b, i64 %30 142 %34 = load i8, ptr %33, align 1 143 %35 = icmp eq i8 %32, %34 144 br i1 %35, label %mismatch_loop_inc, label %mismatch_end 145 146mismatch_loop_inc: ; preds = %mismatch_loop 147 %36 = add i32 %mismatch_index, 1 148 %37 = icmp eq i32 %36, %n 149 br i1 %37, label %mismatch_end, label %mismatch_loop 150 151mismatch_end: ; preds = %mismatch_loop_inc, %mismatch_loop, %mismatch_vec_loop_found, %mismatch_vec_loop_inc 152 %mismatch_result = phi i32 [ %n, %mismatch_loop_inc ], [ %mismatch_index, %mismatch_loop ], [ %n, %mismatch_vec_loop_inc ], [ %29, %mismatch_vec_loop_found ] 153 br i1 true, label %byte.compare, label %while.cond 154 155while.cond: ; preds = %mismatch_end, %while.body 156 %len.addr = phi i32 [ %len, %mismatch_end ], [ %mismatch_result, %while.body ] 157 %inc = add i32 %len.addr, 1 158 %cmp.not = icmp eq i32 %mismatch_result, %n 159 br i1 %cmp.not, label %while.end, label %while.body 160 161while.body: ; preds = %while.cond 162 %idxprom = zext i32 %mismatch_result to i64 163 %arrayidx = getelementptr inbounds i8, ptr %a, i64 %idxprom 164 %38 = load i8, ptr %arrayidx, align 1 165 %arrayidx2 = getelementptr inbounds i8, ptr %b, i64 %idxprom 166 %39 = load i8, ptr %arrayidx2, align 1 167 %cmp.not2 = icmp eq i8 %38, %39 168 br i1 %cmp.not2, label %while.cond, label %while.end 169 170byte.compare: ; preds = %mismatch_end 171 br label %while.end 172 173while.end: ; preds = %byte.compare, %while.body, %while.cond 174 %inc.lcssa = phi i32 [ %mismatch_result, %while.body ], [ %mismatch_result, %while.cond ], [ %mismatch_result, %byte.compare ] 175 ret i32 %inc.lcssa 176} 177 178