xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/vector-compress.ll (revision 96f5c683500eb2d7f7c3984e3a056315c50c4662) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2; RUN: llc -verify-machineinstrs -mtriple=riscv32 -mattr=+m,+v,+f,+d,+zvfh,+zvfbfmin < %s | FileCheck %s
3; RUN: llc -verify-machineinstrs -mtriple=riscv64 -mattr=+m,+v,+f,+d,+zvfh,+zvfbfmin < %s | FileCheck %s
4; RUN: llc -verify-machineinstrs -mtriple=riscv32 -mattr=+m,+v,+f,+d,+zvfhmin,+zvfbfmin < %s | FileCheck %s
5; RUN: llc -verify-machineinstrs -mtriple=riscv64 -mattr=+m,+v,+f,+d,+zvfhmin,+zvfbfmin < %s | FileCheck %s
6
7; Vector compress for i8 type
8
9define <vscale x 1 x i8> @vector_compress_nxv1i8(<vscale x 1 x i8> %data, <vscale x 1 x i1> %mask) {
10; CHECK-LABEL: vector_compress_nxv1i8:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
13; CHECK-NEXT:    vcompress.vm v9, v8, v0
14; CHECK-NEXT:    vmv1r.v v8, v9
15; CHECK-NEXT:    ret
16  %ret = call <vscale x 1 x i8> @llvm.experimental.vector.compress.nxv1i8(<vscale x 1 x i8> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i8> undef)
17  ret <vscale x 1 x i8> %ret
18}
19
20define <vscale x 1 x i8> @vector_compress_nxv1i8_passthru(<vscale x 1 x i8> %passthru, <vscale x 1 x i8> %data, <vscale x 1 x i1> %mask) {
21; CHECK-LABEL: vector_compress_nxv1i8_passthru:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, tu, ma
24; CHECK-NEXT:    vcompress.vm v8, v9, v0
25; CHECK-NEXT:    ret
26  %ret = call <vscale x 1 x i8> @llvm.experimental.vector.compress.nxv1i8(<vscale x 1 x i8> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i8> %passthru)
27  ret <vscale x 1 x i8> %ret
28}
29
30define <vscale x 2 x i8> @vector_compress_nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i1> %mask) {
31; CHECK-LABEL: vector_compress_nxv2i8:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
34; CHECK-NEXT:    vcompress.vm v9, v8, v0
35; CHECK-NEXT:    vmv1r.v v8, v9
36; CHECK-NEXT:    ret
37  %ret = call <vscale x 2 x i8> @llvm.experimental.vector.compress.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i8> undef)
38  ret <vscale x 2 x i8> %ret
39}
40
41define <vscale x 2 x i8> @vector_compress_nxv2i8_passthru(<vscale x 2 x i8> %passthru, <vscale x 2 x i8> %data, <vscale x 2 x i1> %mask) {
42; CHECK-LABEL: vector_compress_nxv2i8_passthru:
43; CHECK:       # %bb.0:
44; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, tu, ma
45; CHECK-NEXT:    vcompress.vm v8, v9, v0
46; CHECK-NEXT:    ret
47  %ret = call <vscale x 2 x i8> @llvm.experimental.vector.compress.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i8> %passthru)
48  ret <vscale x 2 x i8> %ret
49}
50
51define <vscale x 4 x i8> @vector_compress_nxv4i8(<vscale x 4 x i8> %data, <vscale x 4 x i1> %mask) {
52; CHECK-LABEL: vector_compress_nxv4i8:
53; CHECK:       # %bb.0:
54; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
55; CHECK-NEXT:    vcompress.vm v9, v8, v0
56; CHECK-NEXT:    vmv1r.v v8, v9
57; CHECK-NEXT:    ret
58  %ret = call <vscale x 4 x i8> @llvm.experimental.vector.compress.nxv4i8(<vscale x 4 x i8> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i8> undef)
59  ret <vscale x 4 x i8> %ret
60}
61
62define <vscale x 4 x i8> @vector_compress_nxv4i8_passthru(<vscale x 4 x i8> %passthru, <vscale x 4 x i8> %data, <vscale x 4 x i1> %mask) {
63; CHECK-LABEL: vector_compress_nxv4i8_passthru:
64; CHECK:       # %bb.0:
65; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, tu, ma
66; CHECK-NEXT:    vcompress.vm v8, v9, v0
67; CHECK-NEXT:    ret
68  %ret = call <vscale x 4 x i8> @llvm.experimental.vector.compress.nxv4i8(<vscale x 4 x i8> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i8> %passthru)
69  ret <vscale x 4 x i8> %ret
70}
71
72define <vscale x 8 x i8> @vector_compress_nxv8i8(<vscale x 8 x i8> %data, <vscale x 8 x i1> %mask) {
73; CHECK-LABEL: vector_compress_nxv8i8:
74; CHECK:       # %bb.0:
75; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
76; CHECK-NEXT:    vcompress.vm v9, v8, v0
77; CHECK-NEXT:    vmv.v.v v8, v9
78; CHECK-NEXT:    ret
79  %ret = call <vscale x 8 x i8> @llvm.experimental.vector.compress.nxv8i8(<vscale x 8 x i8> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i8> undef)
80  ret <vscale x 8 x i8> %ret
81}
82
83define <vscale x 8 x i8> @vector_compress_nxv8i8_passthru(<vscale x 8 x i8> %passthru, <vscale x 8 x i8> %data, <vscale x 8 x i1> %mask) {
84; CHECK-LABEL: vector_compress_nxv8i8_passthru:
85; CHECK:       # %bb.0:
86; CHECK-NEXT:    vsetvli a0, zero, e8, m1, tu, ma
87; CHECK-NEXT:    vcompress.vm v8, v9, v0
88; CHECK-NEXT:    ret
89  %ret = call <vscale x 8 x i8> @llvm.experimental.vector.compress.nxv8i8(<vscale x 8 x i8> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i8> %passthru)
90  ret <vscale x 8 x i8> %ret
91}
92
93define <vscale x 16 x i8> @vector_compress_nxv16i8(<vscale x 16 x i8> %data, <vscale x 16 x i1> %mask) {
94; CHECK-LABEL: vector_compress_nxv16i8:
95; CHECK:       # %bb.0:
96; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
97; CHECK-NEXT:    vcompress.vm v10, v8, v0
98; CHECK-NEXT:    vmv.v.v v8, v10
99; CHECK-NEXT:    ret
100  %ret = call <vscale x 16 x i8> @llvm.experimental.vector.compress.nxv16i8(<vscale x 16 x i8> %data, <vscale x 16 x i1> %mask, <vscale x 16 x i8> undef)
101  ret <vscale x 16 x i8> %ret
102}
103
104define <vscale x 16 x i8> @vector_compress_nxv16i8_passthru(<vscale x 16 x i8> %passthru, <vscale x 16 x i8> %data, <vscale x 16 x i1> %mask) {
105; CHECK-LABEL: vector_compress_nxv16i8_passthru:
106; CHECK:       # %bb.0:
107; CHECK-NEXT:    vsetvli a0, zero, e8, m2, tu, ma
108; CHECK-NEXT:    vcompress.vm v8, v10, v0
109; CHECK-NEXT:    ret
110  %ret = call <vscale x 16 x i8> @llvm.experimental.vector.compress.nxv16i8(<vscale x 16 x i8> %data, <vscale x 16 x i1> %mask, <vscale x 16 x i8> %passthru)
111  ret <vscale x 16 x i8> %ret
112}
113
114define <vscale x 32 x i8> @vector_compress_nxv32i8(<vscale x 32 x i8> %data, <vscale x 32 x i1> %mask) {
115; CHECK-LABEL: vector_compress_nxv32i8:
116; CHECK:       # %bb.0:
117; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
118; CHECK-NEXT:    vcompress.vm v12, v8, v0
119; CHECK-NEXT:    vmv.v.v v8, v12
120; CHECK-NEXT:    ret
121  %ret = call <vscale x 32 x i8> @llvm.experimental.vector.compress.nxv32i8(<vscale x 32 x i8> %data, <vscale x 32 x i1> %mask, <vscale x 32 x i8> undef)
122  ret <vscale x 32 x i8> %ret
123}
124
125define <vscale x 32 x i8> @vector_compress_nxv32i8_passthru(<vscale x 32 x i8> %passthru, <vscale x 32 x i8> %data, <vscale x 32 x i1> %mask) {
126; CHECK-LABEL: vector_compress_nxv32i8_passthru:
127; CHECK:       # %bb.0:
128; CHECK-NEXT:    vsetvli a0, zero, e8, m4, tu, ma
129; CHECK-NEXT:    vcompress.vm v8, v12, v0
130; CHECK-NEXT:    ret
131  %ret = call <vscale x 32 x i8> @llvm.experimental.vector.compress.nxv32i8(<vscale x 32 x i8> %data, <vscale x 32 x i1> %mask, <vscale x 32 x i8> %passthru)
132  ret <vscale x 32 x i8> %ret
133}
134
135define <vscale x 64 x i8> @vector_compress_nxv64i8(<vscale x 64 x i8> %data, <vscale x 64 x i1> %mask) {
136; CHECK-LABEL: vector_compress_nxv64i8:
137; CHECK:       # %bb.0:
138; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
139; CHECK-NEXT:    vcompress.vm v16, v8, v0
140; CHECK-NEXT:    vmv.v.v v8, v16
141; CHECK-NEXT:    ret
142  %ret = call <vscale x 64 x i8> @llvm.experimental.vector.compress.nxv64i8(<vscale x 64 x i8> %data, <vscale x 64 x i1> %mask, <vscale x 64 x i8> undef)
143  ret <vscale x 64 x i8> %ret
144}
145
146define <vscale x 64 x i8> @vector_compress_nxv64i8_passthru(<vscale x 64 x i8> %passthru, <vscale x 64 x i8> %data, <vscale x 64 x i1> %mask) {
147; CHECK-LABEL: vector_compress_nxv64i8_passthru:
148; CHECK:       # %bb.0:
149; CHECK-NEXT:    vsetvli a0, zero, e8, m8, tu, ma
150; CHECK-NEXT:    vcompress.vm v8, v16, v0
151; CHECK-NEXT:    ret
152  %ret = call <vscale x 64 x i8> @llvm.experimental.vector.compress.nxv64i8(<vscale x 64 x i8> %data, <vscale x 64 x i1> %mask, <vscale x 64 x i8> %passthru)
153  ret <vscale x 64 x i8> %ret
154}
155
156; Vector compress for i16 type
157
158define <vscale x 1 x i16> @vector_compress_nxv1i16(<vscale x 1 x i16> %data, <vscale x 1 x i1> %mask) {
159; CHECK-LABEL: vector_compress_nxv1i16:
160; CHECK:       # %bb.0:
161; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
162; CHECK-NEXT:    vcompress.vm v9, v8, v0
163; CHECK-NEXT:    vmv1r.v v8, v9
164; CHECK-NEXT:    ret
165  %ret = call <vscale x 1 x i16> @llvm.experimental.vector.compress.nxv1i16(<vscale x 1 x i16> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i16> undef)
166  ret <vscale x 1 x i16> %ret
167}
168
169define <vscale x 1 x i16> @vector_compress_nxv1i16_passthru(<vscale x 1 x i16> %passthru, <vscale x 1 x i16> %data, <vscale x 1 x i1> %mask) {
170; CHECK-LABEL: vector_compress_nxv1i16_passthru:
171; CHECK:       # %bb.0:
172; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, tu, ma
173; CHECK-NEXT:    vcompress.vm v8, v9, v0
174; CHECK-NEXT:    ret
175  %ret = call <vscale x 1 x i16> @llvm.experimental.vector.compress.nxv1i16(<vscale x 1 x i16> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i16> %passthru)
176  ret <vscale x 1 x i16> %ret
177}
178
179define <vscale x 2 x i16> @vector_compress_nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i1> %mask) {
180; CHECK-LABEL: vector_compress_nxv2i16:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
183; CHECK-NEXT:    vcompress.vm v9, v8, v0
184; CHECK-NEXT:    vmv1r.v v8, v9
185; CHECK-NEXT:    ret
186  %ret = call <vscale x 2 x i16> @llvm.experimental.vector.compress.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i16> undef)
187  ret <vscale x 2 x i16> %ret
188}
189
190define <vscale x 2 x i16> @vector_compress_nxv2i16_passthru(<vscale x 2 x i16> %passthru, <vscale x 2 x i16> %data, <vscale x 2 x i1> %mask) {
191; CHECK-LABEL: vector_compress_nxv2i16_passthru:
192; CHECK:       # %bb.0:
193; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, tu, ma
194; CHECK-NEXT:    vcompress.vm v8, v9, v0
195; CHECK-NEXT:    ret
196  %ret = call <vscale x 2 x i16> @llvm.experimental.vector.compress.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i16> %passthru)
197  ret <vscale x 2 x i16> %ret
198}
199
200define <vscale x 4 x i16> @vector_compress_nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x i1> %mask) {
201; CHECK-LABEL: vector_compress_nxv4i16:
202; CHECK:       # %bb.0:
203; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
204; CHECK-NEXT:    vcompress.vm v9, v8, v0
205; CHECK-NEXT:    vmv.v.v v8, v9
206; CHECK-NEXT:    ret
207  %ret = call <vscale x 4 x i16> @llvm.experimental.vector.compress.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i16> undef)
208  ret <vscale x 4 x i16> %ret
209}
210
211define <vscale x 4 x i16> @vector_compress_nxv4i16_passthru(<vscale x 4 x i16> %passthru, <vscale x 4 x i16> %data, <vscale x 4 x i1> %mask) {
212; CHECK-LABEL: vector_compress_nxv4i16_passthru:
213; CHECK:       # %bb.0:
214; CHECK-NEXT:    vsetvli a0, zero, e16, m1, tu, ma
215; CHECK-NEXT:    vcompress.vm v8, v9, v0
216; CHECK-NEXT:    ret
217  %ret = call <vscale x 4 x i16> @llvm.experimental.vector.compress.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i16> %passthru)
218  ret <vscale x 4 x i16> %ret
219}
220
221define <vscale x 8 x i16> @vector_compress_nxv8i16(<vscale x 8 x i16> %data, <vscale x 8 x i1> %mask) {
222; CHECK-LABEL: vector_compress_nxv8i16:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
225; CHECK-NEXT:    vcompress.vm v10, v8, v0
226; CHECK-NEXT:    vmv.v.v v8, v10
227; CHECK-NEXT:    ret
228  %ret = call <vscale x 8 x i16> @llvm.experimental.vector.compress.nxv8i16(<vscale x 8 x i16> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i16> undef)
229  ret <vscale x 8 x i16> %ret
230}
231
232define <vscale x 8 x i16> @vector_compress_nxv8i16_passthru(<vscale x 8 x i16> %passthru, <vscale x 8 x i16> %data, <vscale x 8 x i1> %mask) {
233; CHECK-LABEL: vector_compress_nxv8i16_passthru:
234; CHECK:       # %bb.0:
235; CHECK-NEXT:    vsetvli a0, zero, e16, m2, tu, ma
236; CHECK-NEXT:    vcompress.vm v8, v10, v0
237; CHECK-NEXT:    ret
238  %ret = call <vscale x 8 x i16> @llvm.experimental.vector.compress.nxv8i16(<vscale x 8 x i16> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i16> %passthru)
239  ret <vscale x 8 x i16> %ret
240}
241
242define <vscale x 16 x i16> @vector_compress_nxv16i16(<vscale x 16 x i16> %data, <vscale x 16 x i1> %mask) {
243; CHECK-LABEL: vector_compress_nxv16i16:
244; CHECK:       # %bb.0:
245; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
246; CHECK-NEXT:    vcompress.vm v12, v8, v0
247; CHECK-NEXT:    vmv.v.v v8, v12
248; CHECK-NEXT:    ret
249  %ret = call <vscale x 16 x i16> @llvm.experimental.vector.compress.nxv16i16(<vscale x 16 x i16> %data, <vscale x 16 x i1> %mask, <vscale x 16 x i16> undef)
250  ret <vscale x 16 x i16> %ret
251}
252
253define <vscale x 16 x i16> @vector_compress_nxv16i16_passthru(<vscale x 16 x i16> %passthru, <vscale x 16 x i16> %data, <vscale x 16 x i1> %mask) {
254; CHECK-LABEL: vector_compress_nxv16i16_passthru:
255; CHECK:       # %bb.0:
256; CHECK-NEXT:    vsetvli a0, zero, e16, m4, tu, ma
257; CHECK-NEXT:    vcompress.vm v8, v12, v0
258; CHECK-NEXT:    ret
259  %ret = call <vscale x 16 x i16> @llvm.experimental.vector.compress.nxv16i16(<vscale x 16 x i16> %data, <vscale x 16 x i1> %mask, <vscale x 16 x i16> %passthru)
260  ret <vscale x 16 x i16> %ret
261}
262
263define <vscale x 32 x i16> @vector_compress_nxv32i16(<vscale x 32 x i16> %data, <vscale x 32 x i1> %mask) {
264; CHECK-LABEL: vector_compress_nxv32i16:
265; CHECK:       # %bb.0:
266; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
267; CHECK-NEXT:    vcompress.vm v16, v8, v0
268; CHECK-NEXT:    vmv.v.v v8, v16
269; CHECK-NEXT:    ret
270  %ret = call <vscale x 32 x i16> @llvm.experimental.vector.compress.nxv32i16(<vscale x 32 x i16> %data, <vscale x 32 x i1> %mask, <vscale x 32 x i16> undef)
271  ret <vscale x 32 x i16> %ret
272}
273
274define <vscale x 32 x i16> @vector_compress_nxv32i16_passthru(<vscale x 32 x i16> %passthru, <vscale x 32 x i16> %data, <vscale x 32 x i1> %mask) {
275; CHECK-LABEL: vector_compress_nxv32i16_passthru:
276; CHECK:       # %bb.0:
277; CHECK-NEXT:    vsetvli a0, zero, e16, m8, tu, ma
278; CHECK-NEXT:    vcompress.vm v8, v16, v0
279; CHECK-NEXT:    ret
280  %ret = call <vscale x 32 x i16> @llvm.experimental.vector.compress.nxv32i16(<vscale x 32 x i16> %data, <vscale x 32 x i1> %mask, <vscale x 32 x i16> %passthru)
281  ret <vscale x 32 x i16> %ret
282}
283
284; Vector compress for i32 type
285
286define <vscale x 1 x i32> @vector_compress_nxv1i32(<vscale x 1 x i32> %data, <vscale x 1 x i1> %mask) {
287; CHECK-LABEL: vector_compress_nxv1i32:
288; CHECK:       # %bb.0:
289; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
290; CHECK-NEXT:    vcompress.vm v9, v8, v0
291; CHECK-NEXT:    vmv1r.v v8, v9
292; CHECK-NEXT:    ret
293  %ret = call <vscale x 1 x i32> @llvm.experimental.vector.compress.nxv1i32(<vscale x 1 x i32> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i32> undef)
294  ret <vscale x 1 x i32> %ret
295}
296
297define <vscale x 1 x i32> @vector_compress_nxv1i32_passthru(<vscale x 1 x i32> %passthru, <vscale x 1 x i32> %data, <vscale x 1 x i1> %mask) {
298; CHECK-LABEL: vector_compress_nxv1i32_passthru:
299; CHECK:       # %bb.0:
300; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, tu, ma
301; CHECK-NEXT:    vcompress.vm v8, v9, v0
302; CHECK-NEXT:    ret
303  %ret = call <vscale x 1 x i32> @llvm.experimental.vector.compress.nxv1i32(<vscale x 1 x i32> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i32> %passthru)
304  ret <vscale x 1 x i32> %ret
305}
306
307define <vscale x 2 x i32> @vector_compress_nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i1> %mask) {
308; CHECK-LABEL: vector_compress_nxv2i32:
309; CHECK:       # %bb.0:
310; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
311; CHECK-NEXT:    vcompress.vm v9, v8, v0
312; CHECK-NEXT:    vmv.v.v v8, v9
313; CHECK-NEXT:    ret
314  %ret = call <vscale x 2 x i32> @llvm.experimental.vector.compress.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i32> undef)
315  ret <vscale x 2 x i32> %ret
316}
317
318define <vscale x 2 x i32> @vector_compress_nxv2i32_passthru(<vscale x 2 x i32> %passthru, <vscale x 2 x i32> %data, <vscale x 2 x i1> %mask) {
319; CHECK-LABEL: vector_compress_nxv2i32_passthru:
320; CHECK:       # %bb.0:
321; CHECK-NEXT:    vsetvli a0, zero, e32, m1, tu, ma
322; CHECK-NEXT:    vcompress.vm v8, v9, v0
323; CHECK-NEXT:    ret
324  %ret = call <vscale x 2 x i32> @llvm.experimental.vector.compress.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i32> %passthru)
325  ret <vscale x 2 x i32> %ret
326}
327
328define <vscale x 4 x i32> @vector_compress_nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> %mask) {
329; CHECK-LABEL: vector_compress_nxv4i32:
330; CHECK:       # %bb.0:
331; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
332; CHECK-NEXT:    vcompress.vm v10, v8, v0
333; CHECK-NEXT:    vmv.v.v v8, v10
334; CHECK-NEXT:    ret
335  %ret = call <vscale x 4 x i32> @llvm.experimental.vector.compress.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i32> undef)
336  ret <vscale x 4 x i32> %ret
337}
338
339define <vscale x 4 x i32> @vector_compress_nxv4i32_passthru(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %data, <vscale x 4 x i1> %mask) {
340; CHECK-LABEL: vector_compress_nxv4i32_passthru:
341; CHECK:       # %bb.0:
342; CHECK-NEXT:    vsetvli a0, zero, e32, m2, tu, ma
343; CHECK-NEXT:    vcompress.vm v8, v10, v0
344; CHECK-NEXT:    ret
345  %ret = call <vscale x 4 x i32> @llvm.experimental.vector.compress.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i32> %passthru)
346  ret <vscale x 4 x i32> %ret
347}
348
349define <vscale x 8 x i32> @vector_compress_nxv8i32(<vscale x 8 x i32> %data, <vscale x 8 x i1> %mask) {
350; CHECK-LABEL: vector_compress_nxv8i32:
351; CHECK:       # %bb.0:
352; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
353; CHECK-NEXT:    vcompress.vm v12, v8, v0
354; CHECK-NEXT:    vmv.v.v v8, v12
355; CHECK-NEXT:    ret
356  %ret = call <vscale x 8 x i32> @llvm.experimental.vector.compress.nxv8i32(<vscale x 8 x i32> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i32> undef)
357  ret <vscale x 8 x i32> %ret
358}
359
360define <vscale x 8 x i32> @vector_compress_nxv8i32_passthru(<vscale x 8 x i32> %passthru, <vscale x 8 x i32> %data, <vscale x 8 x i1> %mask) {
361; CHECK-LABEL: vector_compress_nxv8i32_passthru:
362; CHECK:       # %bb.0:
363; CHECK-NEXT:    vsetvli a0, zero, e32, m4, tu, ma
364; CHECK-NEXT:    vcompress.vm v8, v12, v0
365; CHECK-NEXT:    ret
366  %ret = call <vscale x 8 x i32> @llvm.experimental.vector.compress.nxv8i32(<vscale x 8 x i32> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i32> %passthru)
367  ret <vscale x 8 x i32> %ret
368}
369
370define <vscale x 16 x i32> @vector_compress_nxv16i32(<vscale x 16 x i32> %data, <vscale x 16 x i1> %mask) {
371; CHECK-LABEL: vector_compress_nxv16i32:
372; CHECK:       # %bb.0:
373; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
374; CHECK-NEXT:    vcompress.vm v16, v8, v0
375; CHECK-NEXT:    vmv.v.v v8, v16
376; CHECK-NEXT:    ret
377  %ret = call <vscale x 16 x i32> @llvm.experimental.vector.compress.nxv16i32(<vscale x 16 x i32> %data, <vscale x 16 x i1> %mask, <vscale x 16 x i32> undef)
378  ret <vscale x 16 x i32> %ret
379}
380
381define <vscale x 16 x i32> @vector_compress_nxv16i32_passthru(<vscale x 16 x i32> %passthru, <vscale x 16 x i32> %data, <vscale x 16 x i1> %mask) {
382; CHECK-LABEL: vector_compress_nxv16i32_passthru:
383; CHECK:       # %bb.0:
384; CHECK-NEXT:    vsetvli a0, zero, e32, m8, tu, ma
385; CHECK-NEXT:    vcompress.vm v8, v16, v0
386; CHECK-NEXT:    ret
387  %ret = call <vscale x 16 x i32> @llvm.experimental.vector.compress.nxv16i32(<vscale x 16 x i32> %data, <vscale x 16 x i1> %mask, <vscale x 16 x i32> %passthru)
388  ret <vscale x 16 x i32> %ret
389}
390
391; Vector compress for i64 type
392
393define <vscale x 1 x i64> @vector_compress_nxv1i64(<vscale x 1 x i64> %data, <vscale x 1 x i1> %mask) {
394; CHECK-LABEL: vector_compress_nxv1i64:
395; CHECK:       # %bb.0:
396; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
397; CHECK-NEXT:    vcompress.vm v9, v8, v0
398; CHECK-NEXT:    vmv.v.v v8, v9
399; CHECK-NEXT:    ret
400  %ret = call <vscale x 1 x i64> @llvm.experimental.vector.compress.nxv1i64(<vscale x 1 x i64> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i64> undef)
401  ret <vscale x 1 x i64> %ret
402}
403
404define <vscale x 1 x i64> @vector_compress_nxv1i64_passthru(<vscale x 1 x i64> %passthru, <vscale x 1 x i64> %data, <vscale x 1 x i1> %mask) {
405; CHECK-LABEL: vector_compress_nxv1i64_passthru:
406; CHECK:       # %bb.0:
407; CHECK-NEXT:    vsetvli a0, zero, e64, m1, tu, ma
408; CHECK-NEXT:    vcompress.vm v8, v9, v0
409; CHECK-NEXT:    ret
410  %ret = call <vscale x 1 x i64> @llvm.experimental.vector.compress.nxv1i64(<vscale x 1 x i64> %data, <vscale x 1 x i1> %mask, <vscale x 1 x i64> %passthru)
411  ret <vscale x 1 x i64> %ret
412}
413
414define <vscale x 2 x i64> @vector_compress_nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> %mask) {
415; CHECK-LABEL: vector_compress_nxv2i64:
416; CHECK:       # %bb.0:
417; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
418; CHECK-NEXT:    vcompress.vm v10, v8, v0
419; CHECK-NEXT:    vmv.v.v v8, v10
420; CHECK-NEXT:    ret
421  %ret = call <vscale x 2 x i64> @llvm.experimental.vector.compress.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i64> undef)
422  ret <vscale x 2 x i64> %ret
423}
424
425define <vscale x 2 x i64> @vector_compress_nxv2i64_passthru(<vscale x 2 x i64> %passthru, <vscale x 2 x i64> %data, <vscale x 2 x i1> %mask) {
426; CHECK-LABEL: vector_compress_nxv2i64_passthru:
427; CHECK:       # %bb.0:
428; CHECK-NEXT:    vsetvli a0, zero, e64, m2, tu, ma
429; CHECK-NEXT:    vcompress.vm v8, v10, v0
430; CHECK-NEXT:    ret
431  %ret = call <vscale x 2 x i64> @llvm.experimental.vector.compress.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i1> %mask, <vscale x 2 x i64> %passthru)
432  ret <vscale x 2 x i64> %ret
433}
434
435define <vscale x 4 x i64> @vector_compress_nxv4i64(<vscale x 4 x i64> %data, <vscale x 4 x i1> %mask) {
436; CHECK-LABEL: vector_compress_nxv4i64:
437; CHECK:       # %bb.0:
438; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
439; CHECK-NEXT:    vcompress.vm v12, v8, v0
440; CHECK-NEXT:    vmv.v.v v8, v12
441; CHECK-NEXT:    ret
442  %ret = call <vscale x 4 x i64> @llvm.experimental.vector.compress.nxv4i64(<vscale x 4 x i64> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i64> undef)
443  ret <vscale x 4 x i64> %ret
444}
445
446define <vscale x 4 x i64> @vector_compress_nxv4i64_passthru(<vscale x 4 x i64> %passthru, <vscale x 4 x i64> %data, <vscale x 4 x i1> %mask) {
447; CHECK-LABEL: vector_compress_nxv4i64_passthru:
448; CHECK:       # %bb.0:
449; CHECK-NEXT:    vsetvli a0, zero, e64, m4, tu, ma
450; CHECK-NEXT:    vcompress.vm v8, v12, v0
451; CHECK-NEXT:    ret
452  %ret = call <vscale x 4 x i64> @llvm.experimental.vector.compress.nxv4i64(<vscale x 4 x i64> %data, <vscale x 4 x i1> %mask, <vscale x 4 x i64> %passthru)
453  ret <vscale x 4 x i64> %ret
454}
455
456define <vscale x 8 x i64> @vector_compress_nxv8i64(<vscale x 8 x i64> %data, <vscale x 8 x i1> %mask) {
457; CHECK-LABEL: vector_compress_nxv8i64:
458; CHECK:       # %bb.0:
459; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
460; CHECK-NEXT:    vcompress.vm v16, v8, v0
461; CHECK-NEXT:    vmv.v.v v8, v16
462; CHECK-NEXT:    ret
463  %ret = call <vscale x 8 x i64> @llvm.experimental.vector.compress.nxv8i64(<vscale x 8 x i64> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i64> undef)
464  ret <vscale x 8 x i64> %ret
465}
466
467define <vscale x 8 x i64> @vector_compress_nxv8i64_passthru(<vscale x 8 x i64> %passthru, <vscale x 8 x i64> %data, <vscale x 8 x i1> %mask) {
468; CHECK-LABEL: vector_compress_nxv8i64_passthru:
469; CHECK:       # %bb.0:
470; CHECK-NEXT:    vsetvli a0, zero, e64, m8, tu, ma
471; CHECK-NEXT:    vcompress.vm v8, v16, v0
472; CHECK-NEXT:    ret
473  %ret = call <vscale x 8 x i64> @llvm.experimental.vector.compress.nxv8i64(<vscale x 8 x i64> %data, <vscale x 8 x i1> %mask, <vscale x 8 x i64> %passthru)
474  ret <vscale x 8 x i64> %ret
475}
476
477; Vector compress for bf16 type
478
479define <vscale x 1 x bfloat> @vector_compress_nxv1bf16(<vscale x 1 x bfloat> %data, <vscale x 1 x i1> %mask) {
480; CHECK-LABEL: vector_compress_nxv1bf16:
481; CHECK:       # %bb.0:
482; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
483; CHECK-NEXT:    vcompress.vm v9, v8, v0
484; CHECK-NEXT:    vmv1r.v v8, v9
485; CHECK-NEXT:    ret
486  %ret = call <vscale x 1 x bfloat> @llvm.experimental.vector.compress.nxv1bf16(<vscale x 1 x bfloat> %data, <vscale x 1 x i1> %mask, <vscale x 1 x bfloat> undef)
487  ret <vscale x 1 x bfloat> %ret
488}
489
490define <vscale x 1 x bfloat> @vector_compress_nxv1bf16_passthru(<vscale x 1 x bfloat> %passthru, <vscale x 1 x bfloat> %data, <vscale x 1 x i1> %mask) {
491; CHECK-LABEL: vector_compress_nxv1bf16_passthru:
492; CHECK:       # %bb.0:
493; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, tu, ma
494; CHECK-NEXT:    vcompress.vm v8, v9, v0
495; CHECK-NEXT:    ret
496  %ret = call <vscale x 1 x bfloat> @llvm.experimental.vector.compress.nxv1bf16(<vscale x 1 x bfloat> %data, <vscale x 1 x i1> %mask, <vscale x 1 x bfloat> %passthru)
497  ret <vscale x 1 x bfloat> %ret
498}
499
500define <vscale x 2 x bfloat> @vector_compress_nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x i1> %mask) {
501; CHECK-LABEL: vector_compress_nxv2bf16:
502; CHECK:       # %bb.0:
503; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
504; CHECK-NEXT:    vcompress.vm v9, v8, v0
505; CHECK-NEXT:    vmv1r.v v8, v9
506; CHECK-NEXT:    ret
507  %ret = call <vscale x 2 x bfloat> @llvm.experimental.vector.compress.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x i1> %mask, <vscale x 2 x bfloat> undef)
508  ret <vscale x 2 x bfloat> %ret
509}
510
511define <vscale x 2 x bfloat> @vector_compress_nxv2bf16_passthru(<vscale x 2 x bfloat> %passthru, <vscale x 2 x bfloat> %data, <vscale x 2 x i1> %mask) {
512; CHECK-LABEL: vector_compress_nxv2bf16_passthru:
513; CHECK:       # %bb.0:
514; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, tu, ma
515; CHECK-NEXT:    vcompress.vm v8, v9, v0
516; CHECK-NEXT:    ret
517  %ret = call <vscale x 2 x bfloat> @llvm.experimental.vector.compress.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x i1> %mask, <vscale x 2 x bfloat> %passthru)
518  ret <vscale x 2 x bfloat> %ret
519}
520
521define <vscale x 4 x bfloat> @vector_compress_nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x i1> %mask) {
522; CHECK-LABEL: vector_compress_nxv4bf16:
523; CHECK:       # %bb.0:
524; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
525; CHECK-NEXT:    vcompress.vm v9, v8, v0
526; CHECK-NEXT:    vmv.v.v v8, v9
527; CHECK-NEXT:    ret
528  %ret = call <vscale x 4 x bfloat> @llvm.experimental.vector.compress.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x i1> %mask, <vscale x 4 x bfloat> undef)
529  ret <vscale x 4 x bfloat> %ret
530}
531
532define <vscale x 4 x bfloat> @vector_compress_nxv4bf16_passthru(<vscale x 4 x bfloat> %passthru, <vscale x 4 x bfloat> %data, <vscale x 4 x i1> %mask) {
533; CHECK-LABEL: vector_compress_nxv4bf16_passthru:
534; CHECK:       # %bb.0:
535; CHECK-NEXT:    vsetvli a0, zero, e16, m1, tu, ma
536; CHECK-NEXT:    vcompress.vm v8, v9, v0
537; CHECK-NEXT:    ret
538  %ret = call <vscale x 4 x bfloat> @llvm.experimental.vector.compress.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x i1> %mask, <vscale x 4 x bfloat> %passthru)
539  ret <vscale x 4 x bfloat> %ret
540}
541
542define <vscale x 8 x bfloat> @vector_compress_nxv8bf16(<vscale x 8 x bfloat> %data, <vscale x 8 x i1> %mask) {
543; CHECK-LABEL: vector_compress_nxv8bf16:
544; CHECK:       # %bb.0:
545; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
546; CHECK-NEXT:    vcompress.vm v10, v8, v0
547; CHECK-NEXT:    vmv.v.v v8, v10
548; CHECK-NEXT:    ret
549  %ret = call <vscale x 8 x bfloat> @llvm.experimental.vector.compress.nxv8bf16(<vscale x 8 x bfloat> %data, <vscale x 8 x i1> %mask, <vscale x 8 x bfloat> undef)
550  ret <vscale x 8 x bfloat> %ret
551}
552
553define <vscale x 8 x bfloat> @vector_compress_nxv8bf16_passthru(<vscale x 8 x bfloat> %passthru, <vscale x 8 x bfloat> %data, <vscale x 8 x i1> %mask) {
554; CHECK-LABEL: vector_compress_nxv8bf16_passthru:
555; CHECK:       # %bb.0:
556; CHECK-NEXT:    vsetvli a0, zero, e16, m2, tu, ma
557; CHECK-NEXT:    vcompress.vm v8, v10, v0
558; CHECK-NEXT:    ret
559  %ret = call <vscale x 8 x bfloat> @llvm.experimental.vector.compress.nxv8bf16(<vscale x 8 x bfloat> %data, <vscale x 8 x i1> %mask, <vscale x 8 x bfloat> %passthru)
560  ret <vscale x 8 x bfloat> %ret
561}
562
563define <vscale x 16 x bfloat> @vector_compress_nxv16bf16(<vscale x 16 x bfloat> %data, <vscale x 16 x i1> %mask) {
564; CHECK-LABEL: vector_compress_nxv16bf16:
565; CHECK:       # %bb.0:
566; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
567; CHECK-NEXT:    vcompress.vm v12, v8, v0
568; CHECK-NEXT:    vmv.v.v v8, v12
569; CHECK-NEXT:    ret
570  %ret = call <vscale x 16 x bfloat> @llvm.experimental.vector.compress.nxv16bf16(<vscale x 16 x bfloat> %data, <vscale x 16 x i1> %mask, <vscale x 16 x bfloat> undef)
571  ret <vscale x 16 x bfloat> %ret
572}
573
574define <vscale x 16 x bfloat> @vector_compress_nxv16bf16_passthru(<vscale x 16 x bfloat> %passthru, <vscale x 16 x bfloat> %data, <vscale x 16 x i1> %mask) {
575; CHECK-LABEL: vector_compress_nxv16bf16_passthru:
576; CHECK:       # %bb.0:
577; CHECK-NEXT:    vsetvli a0, zero, e16, m4, tu, ma
578; CHECK-NEXT:    vcompress.vm v8, v12, v0
579; CHECK-NEXT:    ret
580  %ret = call <vscale x 16 x bfloat> @llvm.experimental.vector.compress.nxv16bf16(<vscale x 16 x bfloat> %data, <vscale x 16 x i1> %mask, <vscale x 16 x bfloat> %passthru)
581  ret <vscale x 16 x bfloat> %ret
582}
583
584define <vscale x 32 x bfloat> @vector_compress_nxv32bf16(<vscale x 32 x bfloat> %data, <vscale x 32 x i1> %mask) {
585; CHECK-LABEL: vector_compress_nxv32bf16:
586; CHECK:       # %bb.0:
587; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
588; CHECK-NEXT:    vcompress.vm v16, v8, v0
589; CHECK-NEXT:    vmv.v.v v8, v16
590; CHECK-NEXT:    ret
591  %ret = call <vscale x 32 x bfloat> @llvm.experimental.vector.compress.nxv32bf16(<vscale x 32 x bfloat> %data, <vscale x 32 x i1> %mask, <vscale x 32 x bfloat> undef)
592  ret <vscale x 32 x bfloat> %ret
593}
594
595define <vscale x 32 x bfloat> @vector_compress_nxv32bf16_passthru(<vscale x 32 x bfloat> %passthru, <vscale x 32 x bfloat> %data, <vscale x 32 x i1> %mask) {
596; CHECK-LABEL: vector_compress_nxv32bf16_passthru:
597; CHECK:       # %bb.0:
598; CHECK-NEXT:    vsetvli a0, zero, e16, m8, tu, ma
599; CHECK-NEXT:    vcompress.vm v8, v16, v0
600; CHECK-NEXT:    ret
601  %ret = call <vscale x 32 x bfloat> @llvm.experimental.vector.compress.nxv32bf16(<vscale x 32 x bfloat> %data, <vscale x 32 x i1> %mask, <vscale x 32 x bfloat> %passthru)
602  ret <vscale x 32 x bfloat> %ret
603}
604
605; Vector compress for f16 type
606
607define <vscale x 1 x half> @vector_compress_nxv1f16(<vscale x 1 x half> %data, <vscale x 1 x i1> %mask) {
608; CHECK-LABEL: vector_compress_nxv1f16:
609; CHECK:       # %bb.0:
610; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
611; CHECK-NEXT:    vcompress.vm v9, v8, v0
612; CHECK-NEXT:    vmv1r.v v8, v9
613; CHECK-NEXT:    ret
614  %ret = call <vscale x 1 x half> @llvm.experimental.vector.compress.nxv1f16(<vscale x 1 x half> %data, <vscale x 1 x i1> %mask, <vscale x 1 x half> undef)
615  ret <vscale x 1 x half> %ret
616}
617
618define <vscale x 1 x half> @vector_compress_nxv1f16_passthru(<vscale x 1 x half> %passthru, <vscale x 1 x half> %data, <vscale x 1 x i1> %mask) {
619; CHECK-LABEL: vector_compress_nxv1f16_passthru:
620; CHECK:       # %bb.0:
621; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, tu, ma
622; CHECK-NEXT:    vcompress.vm v8, v9, v0
623; CHECK-NEXT:    ret
624  %ret = call <vscale x 1 x half> @llvm.experimental.vector.compress.nxv1f16(<vscale x 1 x half> %data, <vscale x 1 x i1> %mask, <vscale x 1 x half> %passthru)
625  ret <vscale x 1 x half> %ret
626}
627
628define <vscale x 2 x half> @vector_compress_nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x i1> %mask) {
629; CHECK-LABEL: vector_compress_nxv2f16:
630; CHECK:       # %bb.0:
631; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
632; CHECK-NEXT:    vcompress.vm v9, v8, v0
633; CHECK-NEXT:    vmv1r.v v8, v9
634; CHECK-NEXT:    ret
635  %ret = call <vscale x 2 x half> @llvm.experimental.vector.compress.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x i1> %mask, <vscale x 2 x half> undef)
636  ret <vscale x 2 x half> %ret
637}
638
639define <vscale x 2 x half> @vector_compress_nxv2f16_passthru(<vscale x 2 x half> %passthru, <vscale x 2 x half> %data, <vscale x 2 x i1> %mask) {
640; CHECK-LABEL: vector_compress_nxv2f16_passthru:
641; CHECK:       # %bb.0:
642; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, tu, ma
643; CHECK-NEXT:    vcompress.vm v8, v9, v0
644; CHECK-NEXT:    ret
645  %ret = call <vscale x 2 x half> @llvm.experimental.vector.compress.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x i1> %mask, <vscale x 2 x half> %passthru)
646  ret <vscale x 2 x half> %ret
647}
648
649define <vscale x 4 x half> @vector_compress_nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x i1> %mask) {
650; CHECK-LABEL: vector_compress_nxv4f16:
651; CHECK:       # %bb.0:
652; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
653; CHECK-NEXT:    vcompress.vm v9, v8, v0
654; CHECK-NEXT:    vmv.v.v v8, v9
655; CHECK-NEXT:    ret
656  %ret = call <vscale x 4 x half> @llvm.experimental.vector.compress.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x i1> %mask, <vscale x 4 x half> undef)
657  ret <vscale x 4 x half> %ret
658}
659
660define <vscale x 4 x half> @vector_compress_nxv4f16_passthru(<vscale x 4 x half> %passthru, <vscale x 4 x half> %data, <vscale x 4 x i1> %mask) {
661; CHECK-LABEL: vector_compress_nxv4f16_passthru:
662; CHECK:       # %bb.0:
663; CHECK-NEXT:    vsetvli a0, zero, e16, m1, tu, ma
664; CHECK-NEXT:    vcompress.vm v8, v9, v0
665; CHECK-NEXT:    ret
666  %ret = call <vscale x 4 x half> @llvm.experimental.vector.compress.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x i1> %mask, <vscale x 4 x half> %passthru)
667  ret <vscale x 4 x half> %ret
668}
669
670define <vscale x 8 x half> @vector_compress_nxv8f16(<vscale x 8 x half> %data, <vscale x 8 x i1> %mask) {
671; CHECK-LABEL: vector_compress_nxv8f16:
672; CHECK:       # %bb.0:
673; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
674; CHECK-NEXT:    vcompress.vm v10, v8, v0
675; CHECK-NEXT:    vmv.v.v v8, v10
676; CHECK-NEXT:    ret
677  %ret = call <vscale x 8 x half> @llvm.experimental.vector.compress.nxv8f16(<vscale x 8 x half> %data, <vscale x 8 x i1> %mask, <vscale x 8 x half> undef)
678  ret <vscale x 8 x half> %ret
679}
680
681define <vscale x 8 x half> @vector_compress_nxv8f16_passthru(<vscale x 8 x half> %passthru, <vscale x 8 x half> %data, <vscale x 8 x i1> %mask) {
682; CHECK-LABEL: vector_compress_nxv8f16_passthru:
683; CHECK:       # %bb.0:
684; CHECK-NEXT:    vsetvli a0, zero, e16, m2, tu, ma
685; CHECK-NEXT:    vcompress.vm v8, v10, v0
686; CHECK-NEXT:    ret
687  %ret = call <vscale x 8 x half> @llvm.experimental.vector.compress.nxv8f16(<vscale x 8 x half> %data, <vscale x 8 x i1> %mask, <vscale x 8 x half> %passthru)
688  ret <vscale x 8 x half> %ret
689}
690
691define <vscale x 16 x half> @vector_compress_nxv16f16(<vscale x 16 x half> %data, <vscale x 16 x i1> %mask) {
692; CHECK-LABEL: vector_compress_nxv16f16:
693; CHECK:       # %bb.0:
694; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
695; CHECK-NEXT:    vcompress.vm v12, v8, v0
696; CHECK-NEXT:    vmv.v.v v8, v12
697; CHECK-NEXT:    ret
698  %ret = call <vscale x 16 x half> @llvm.experimental.vector.compress.nxv16f16(<vscale x 16 x half> %data, <vscale x 16 x i1> %mask, <vscale x 16 x half> undef)
699  ret <vscale x 16 x half> %ret
700}
701
702define <vscale x 16 x half> @vector_compress_nxv16f16_passthru(<vscale x 16 x half> %passthru, <vscale x 16 x half> %data, <vscale x 16 x i1> %mask) {
703; CHECK-LABEL: vector_compress_nxv16f16_passthru:
704; CHECK:       # %bb.0:
705; CHECK-NEXT:    vsetvli a0, zero, e16, m4, tu, ma
706; CHECK-NEXT:    vcompress.vm v8, v12, v0
707; CHECK-NEXT:    ret
708  %ret = call <vscale x 16 x half> @llvm.experimental.vector.compress.nxv16f16(<vscale x 16 x half> %data, <vscale x 16 x i1> %mask, <vscale x 16 x half> %passthru)
709  ret <vscale x 16 x half> %ret
710}
711
712define <vscale x 32 x half> @vector_compress_nxv32f16(<vscale x 32 x half> %data, <vscale x 32 x i1> %mask) {
713; CHECK-LABEL: vector_compress_nxv32f16:
714; CHECK:       # %bb.0:
715; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
716; CHECK-NEXT:    vcompress.vm v16, v8, v0
717; CHECK-NEXT:    vmv.v.v v8, v16
718; CHECK-NEXT:    ret
719  %ret = call <vscale x 32 x half> @llvm.experimental.vector.compress.nxv32f16(<vscale x 32 x half> %data, <vscale x 32 x i1> %mask, <vscale x 32 x half> undef)
720  ret <vscale x 32 x half> %ret
721}
722
723define <vscale x 32 x half> @vector_compress_nxv32f16_passthru(<vscale x 32 x half> %passthru, <vscale x 32 x half> %data, <vscale x 32 x i1> %mask) {
724; CHECK-LABEL: vector_compress_nxv32f16_passthru:
725; CHECK:       # %bb.0:
726; CHECK-NEXT:    vsetvli a0, zero, e16, m8, tu, ma
727; CHECK-NEXT:    vcompress.vm v8, v16, v0
728; CHECK-NEXT:    ret
729  %ret = call <vscale x 32 x half> @llvm.experimental.vector.compress.nxv32f16(<vscale x 32 x half> %data, <vscale x 32 x i1> %mask, <vscale x 32 x half> %passthru)
730  ret <vscale x 32 x half> %ret
731}
732
733; Vector compress for f32 type
734
735define <vscale x 1 x float> @vector_compress_nxv1f32(<vscale x 1 x float> %data, <vscale x 1 x i1> %mask) {
736; CHECK-LABEL: vector_compress_nxv1f32:
737; CHECK:       # %bb.0:
738; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
739; CHECK-NEXT:    vcompress.vm v9, v8, v0
740; CHECK-NEXT:    vmv1r.v v8, v9
741; CHECK-NEXT:    ret
742  %ret = call <vscale x 1 x float> @llvm.experimental.vector.compress.nxv1f32(<vscale x 1 x float> %data, <vscale x 1 x i1> %mask, <vscale x 1 x float> undef)
743  ret <vscale x 1 x float> %ret
744}
745
746define <vscale x 1 x float> @vector_compress_nxv1f32_passthru(<vscale x 1 x float> %passthru, <vscale x 1 x float> %data, <vscale x 1 x i1> %mask) {
747; CHECK-LABEL: vector_compress_nxv1f32_passthru:
748; CHECK:       # %bb.0:
749; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, tu, ma
750; CHECK-NEXT:    vcompress.vm v8, v9, v0
751; CHECK-NEXT:    ret
752  %ret = call <vscale x 1 x float> @llvm.experimental.vector.compress.nxv1f32(<vscale x 1 x float> %data, <vscale x 1 x i1> %mask, <vscale x 1 x float> %passthru)
753  ret <vscale x 1 x float> %ret
754}
755
756define <vscale x 2 x float> @vector_compress_nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x i1> %mask) {
757; CHECK-LABEL: vector_compress_nxv2f32:
758; CHECK:       # %bb.0:
759; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
760; CHECK-NEXT:    vcompress.vm v9, v8, v0
761; CHECK-NEXT:    vmv.v.v v8, v9
762; CHECK-NEXT:    ret
763  %ret = call <vscale x 2 x float> @llvm.experimental.vector.compress.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x i1> %mask, <vscale x 2 x float> undef)
764  ret <vscale x 2 x float> %ret
765}
766
767define <vscale x 2 x float> @vector_compress_nxv2f32_passthru(<vscale x 2 x float> %passthru, <vscale x 2 x float> %data, <vscale x 2 x i1> %mask) {
768; CHECK-LABEL: vector_compress_nxv2f32_passthru:
769; CHECK:       # %bb.0:
770; CHECK-NEXT:    vsetvli a0, zero, e32, m1, tu, ma
771; CHECK-NEXT:    vcompress.vm v8, v9, v0
772; CHECK-NEXT:    ret
773  %ret = call <vscale x 2 x float> @llvm.experimental.vector.compress.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x i1> %mask, <vscale x 2 x float> %passthru)
774  ret <vscale x 2 x float> %ret
775}
776
777define <vscale x 4 x float> @vector_compress_nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x i1> %mask) {
778; CHECK-LABEL: vector_compress_nxv4f32:
779; CHECK:       # %bb.0:
780; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
781; CHECK-NEXT:    vcompress.vm v10, v8, v0
782; CHECK-NEXT:    vmv.v.v v8, v10
783; CHECK-NEXT:    ret
784  %ret = call <vscale x 4 x float> @llvm.experimental.vector.compress.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x i1> %mask, <vscale x 4 x float> undef)
785  ret <vscale x 4 x float> %ret
786}
787
788define <vscale x 4 x float> @vector_compress_nxv4f32_passthru(<vscale x 4 x float> %passthru, <vscale x 4 x float> %data, <vscale x 4 x i1> %mask) {
789; CHECK-LABEL: vector_compress_nxv4f32_passthru:
790; CHECK:       # %bb.0:
791; CHECK-NEXT:    vsetvli a0, zero, e32, m2, tu, ma
792; CHECK-NEXT:    vcompress.vm v8, v10, v0
793; CHECK-NEXT:    ret
794  %ret = call <vscale x 4 x float> @llvm.experimental.vector.compress.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x i1> %mask, <vscale x 4 x float> %passthru)
795  ret <vscale x 4 x float> %ret
796}
797
798define <vscale x 8 x float> @vector_compress_nxv8f32(<vscale x 8 x float> %data, <vscale x 8 x i1> %mask) {
799; CHECK-LABEL: vector_compress_nxv8f32:
800; CHECK:       # %bb.0:
801; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
802; CHECK-NEXT:    vcompress.vm v12, v8, v0
803; CHECK-NEXT:    vmv.v.v v8, v12
804; CHECK-NEXT:    ret
805  %ret = call <vscale x 8 x float> @llvm.experimental.vector.compress.nxv8f32(<vscale x 8 x float> %data, <vscale x 8 x i1> %mask, <vscale x 8 x float> undef)
806  ret <vscale x 8 x float> %ret
807}
808
809define <vscale x 8 x float> @vector_compress_nxv8f32_passthru(<vscale x 8 x float> %passthru, <vscale x 8 x float> %data, <vscale x 8 x i1> %mask) {
810; CHECK-LABEL: vector_compress_nxv8f32_passthru:
811; CHECK:       # %bb.0:
812; CHECK-NEXT:    vsetvli a0, zero, e32, m4, tu, ma
813; CHECK-NEXT:    vcompress.vm v8, v12, v0
814; CHECK-NEXT:    ret
815  %ret = call <vscale x 8 x float> @llvm.experimental.vector.compress.nxv8f32(<vscale x 8 x float> %data, <vscale x 8 x i1> %mask, <vscale x 8 x float> %passthru)
816  ret <vscale x 8 x float> %ret
817}
818
819define <vscale x 16 x float> @vector_compress_nxv16f32(<vscale x 16 x float> %data, <vscale x 16 x i1> %mask) {
820; CHECK-LABEL: vector_compress_nxv16f32:
821; CHECK:       # %bb.0:
822; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
823; CHECK-NEXT:    vcompress.vm v16, v8, v0
824; CHECK-NEXT:    vmv.v.v v8, v16
825; CHECK-NEXT:    ret
826  %ret = call <vscale x 16 x float> @llvm.experimental.vector.compress.nxv16f32(<vscale x 16 x float> %data, <vscale x 16 x i1> %mask, <vscale x 16 x float> undef)
827  ret <vscale x 16 x float> %ret
828}
829
830define <vscale x 16 x float> @vector_compress_nxv16f32_passthru(<vscale x 16 x float> %passthru, <vscale x 16 x float> %data, <vscale x 16 x i1> %mask) {
831; CHECK-LABEL: vector_compress_nxv16f32_passthru:
832; CHECK:       # %bb.0:
833; CHECK-NEXT:    vsetvli a0, zero, e32, m8, tu, ma
834; CHECK-NEXT:    vcompress.vm v8, v16, v0
835; CHECK-NEXT:    ret
836  %ret = call <vscale x 16 x float> @llvm.experimental.vector.compress.nxv16f32(<vscale x 16 x float> %data, <vscale x 16 x i1> %mask, <vscale x 16 x float> %passthru)
837  ret <vscale x 16 x float> %ret
838}
839
840; Vector compress for f64 type
841
842define <vscale x 1 x double> @vector_compress_nxv1f64(<vscale x 1 x double> %data, <vscale x 1 x i1> %mask) {
843; CHECK-LABEL: vector_compress_nxv1f64:
844; CHECK:       # %bb.0:
845; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
846; CHECK-NEXT:    vcompress.vm v9, v8, v0
847; CHECK-NEXT:    vmv.v.v v8, v9
848; CHECK-NEXT:    ret
849  %ret = call <vscale x 1 x double> @llvm.experimental.vector.compress.nxv1f64(<vscale x 1 x double> %data, <vscale x 1 x i1> %mask, <vscale x 1 x double> undef)
850  ret <vscale x 1 x double> %ret
851}
852
853define <vscale x 1 x double> @vector_compress_nxv1f64_passthru(<vscale x 1 x double> %passthru, <vscale x 1 x double> %data, <vscale x 1 x i1> %mask) {
854; CHECK-LABEL: vector_compress_nxv1f64_passthru:
855; CHECK:       # %bb.0:
856; CHECK-NEXT:    vsetvli a0, zero, e64, m1, tu, ma
857; CHECK-NEXT:    vcompress.vm v8, v9, v0
858; CHECK-NEXT:    ret
859  %ret = call <vscale x 1 x double> @llvm.experimental.vector.compress.nxv1f64(<vscale x 1 x double> %data, <vscale x 1 x i1> %mask, <vscale x 1 x double> %passthru)
860  ret <vscale x 1 x double> %ret
861}
862
863define <vscale x 2 x double> @vector_compress_nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i1> %mask) {
864; CHECK-LABEL: vector_compress_nxv2f64:
865; CHECK:       # %bb.0:
866; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
867; CHECK-NEXT:    vcompress.vm v10, v8, v0
868; CHECK-NEXT:    vmv.v.v v8, v10
869; CHECK-NEXT:    ret
870  %ret = call <vscale x 2 x double> @llvm.experimental.vector.compress.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i1> %mask, <vscale x 2 x double> undef)
871  ret <vscale x 2 x double> %ret
872}
873
874define <vscale x 2 x double> @vector_compress_nxv2f64_passthru(<vscale x 2 x double> %passthru, <vscale x 2 x double> %data, <vscale x 2 x i1> %mask) {
875; CHECK-LABEL: vector_compress_nxv2f64_passthru:
876; CHECK:       # %bb.0:
877; CHECK-NEXT:    vsetvli a0, zero, e64, m2, tu, ma
878; CHECK-NEXT:    vcompress.vm v8, v10, v0
879; CHECK-NEXT:    ret
880  %ret = call <vscale x 2 x double> @llvm.experimental.vector.compress.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x i1> %mask, <vscale x 2 x double> %passthru)
881  ret <vscale x 2 x double> %ret
882}
883
884define <vscale x 4 x double> @vector_compress_nxv4f64(<vscale x 4 x double> %data, <vscale x 4 x i1> %mask) {
885; CHECK-LABEL: vector_compress_nxv4f64:
886; CHECK:       # %bb.0:
887; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
888; CHECK-NEXT:    vcompress.vm v12, v8, v0
889; CHECK-NEXT:    vmv.v.v v8, v12
890; CHECK-NEXT:    ret
891  %ret = call <vscale x 4 x double> @llvm.experimental.vector.compress.nxv4f64(<vscale x 4 x double> %data, <vscale x 4 x i1> %mask, <vscale x 4 x double> undef)
892  ret <vscale x 4 x double> %ret
893}
894
895define <vscale x 4 x double> @vector_compress_nxv4f64_passthru(<vscale x 4 x double> %passthru, <vscale x 4 x double> %data, <vscale x 4 x i1> %mask) {
896; CHECK-LABEL: vector_compress_nxv4f64_passthru:
897; CHECK:       # %bb.0:
898; CHECK-NEXT:    vsetvli a0, zero, e64, m4, tu, ma
899; CHECK-NEXT:    vcompress.vm v8, v12, v0
900; CHECK-NEXT:    ret
901  %ret = call <vscale x 4 x double> @llvm.experimental.vector.compress.nxv4f64(<vscale x 4 x double> %data, <vscale x 4 x i1> %mask, <vscale x 4 x double> %passthru)
902  ret <vscale x 4 x double> %ret
903}
904
905define <vscale x 8 x double> @vector_compress_nxv8f64(<vscale x 8 x double> %data, <vscale x 8 x i1> %mask) {
906; CHECK-LABEL: vector_compress_nxv8f64:
907; CHECK:       # %bb.0:
908; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
909; CHECK-NEXT:    vcompress.vm v16, v8, v0
910; CHECK-NEXT:    vmv.v.v v8, v16
911; CHECK-NEXT:    ret
912  %ret = call <vscale x 8 x double> @llvm.experimental.vector.compress.nxv8f64(<vscale x 8 x double> %data, <vscale x 8 x i1> %mask, <vscale x 8 x double> undef)
913  ret <vscale x 8 x double> %ret
914}
915
916define <vscale x 8 x double> @vector_compress_nxv8f64_passthru(<vscale x 8 x double> %passthru, <vscale x 8 x double> %data, <vscale x 8 x i1> %mask) {
917; CHECK-LABEL: vector_compress_nxv8f64_passthru:
918; CHECK:       # %bb.0:
919; CHECK-NEXT:    vsetvli a0, zero, e64, m8, tu, ma
920; CHECK-NEXT:    vcompress.vm v8, v16, v0
921; CHECK-NEXT:    ret
922  %ret = call <vscale x 8 x double> @llvm.experimental.vector.compress.nxv8f64(<vscale x 8 x double> %data, <vscale x 8 x i1> %mask, <vscale x 8 x double> %passthru)
923  ret <vscale x 8 x double> %ret
924}
925