xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/variant-cc.ll (revision 982a586ab481d5470a732c8eec898cb72d789b0e)
1; RUN: llc -mtriple=riscv64 -mattr=+v -o - %s | FileCheck %s --check-prefix=CHECK-ASM
2; RUN: llc -mtriple=riscv64 -mattr=+v -filetype=obj -o - %s \
3; RUN:   | llvm-readobj --symbols - | FileCheck %s --check-prefix=CHECK-OBJ
4
5define i32 @base_cc() {
6; CHECK-ASM-LABEL: base_cc:
7; CHECK-ASM-NOT: .variant_cc
8; CHECK-OBJ-LABEL: Name: base_cc
9; CHECK-OBJ: Other: 0
10  ret i32 42
11}
12
13define <4 x i32> @fixed_vector_cc_1(<4 x i32> %arg) {
14; CHECK-ASM: .variant_cc fixed_vector_cc_1
15; CHECK-ASM-NEXT: fixed_vector_cc_1:
16; CHECK-OBJ-LABEL: Name: fixed_vector_cc_1
17; CHECK-OBJ: Other [ (0x80)
18  ret <4 x i32> %arg
19}
20
21define <vscale x 4 x i32> @rvv_vector_cc_1() {
22; CHECK-ASM: .variant_cc rvv_vector_cc_1
23; CHECK-ASM-NEXT: rvv_vector_cc_1:
24; CHECK-OBJ-LABEL: Name: rvv_vector_cc_1
25; CHECK-OBJ: Other [ (0x80)
26  ret <vscale x 4 x i32> undef
27}
28
29define <vscale x 4 x i1> @rvv_vector_cc_2() {
30; CHECK-ASM: .variant_cc rvv_vector_cc_2
31; CHECK-ASM-NEXT: rvv_vector_cc_2:
32; CHECK-OBJ-LABEL: Name: rvv_vector_cc_2
33; CHECK-OBJ: Other [ (0x80)
34  ret <vscale x 4 x i1> undef
35}
36
37define void @rvv_vector_cc_3(<vscale x 4 x i32> %arg) {
38; CHECK-ASM: .variant_cc rvv_vector_cc_3
39; CHECK-ASM-NEXT: rvv_vector_cc_3:
40; CHECK-OBJ-LABEL: Name: rvv_vector_cc_3
41; CHECK-OBJ: Other [ (0x80)
42  ret void
43}
44
45define void @rvv_vector_cc_4(<vscale x 4 x i1> %arg) {
46; CHECK-ASM: .variant_cc rvv_vector_cc_4
47; CHECK-ASM-NEXT: rvv_vector_cc_4:
48; CHECK-OBJ-LABEL: Name: rvv_vector_cc_4
49; CHECK-OBJ: Other [ (0x80)
50  ret void
51}
52