xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll (revision d89d45ca9a6e51be388a6ff3893d59e54748b928) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s
3
4declare { <vscale x 1 x i8>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i8(<vscale x 1 x i8>, <vscale x 1 x i8>)
5
6define <vscale x 1 x i8> @smulo_nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y) {
7; CHECK-LABEL: smulo_nxv1i8:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    vsetvli a0, zero, e8, mf8, ta, ma
10; CHECK-NEXT:    vmulh.vv v10, v8, v9
11; CHECK-NEXT:    vmul.vv v8, v8, v9
12; CHECK-NEXT:    vsra.vi v9, v8, 7
13; CHECK-NEXT:    vmsne.vv v0, v10, v9
14; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
15; CHECK-NEXT:    ret
16  %a = call { <vscale x 1 x i8>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i8(<vscale x 1 x i8> %x, <vscale x 1 x i8> %y)
17  %b = extractvalue { <vscale x 1 x i8>, <vscale x 1 x i1> } %a, 0
18  %c = extractvalue { <vscale x 1 x i8>, <vscale x 1 x i1> } %a, 1
19  %d = select <vscale x 1 x i1> %c, <vscale x 1 x i8> zeroinitializer, <vscale x 1 x i8> %b
20  ret <vscale x 1 x i8> %d
21}
22
23declare { <vscale x 2 x i8>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8>)
24
25define <vscale x 2 x i8> @smulo_nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y) {
26; CHECK-LABEL: smulo_nxv2i8:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, ma
29; CHECK-NEXT:    vmulh.vv v10, v8, v9
30; CHECK-NEXT:    vmul.vv v8, v8, v9
31; CHECK-NEXT:    vsra.vi v9, v8, 7
32; CHECK-NEXT:    vmsne.vv v0, v10, v9
33; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
34; CHECK-NEXT:    ret
35  %a = call { <vscale x 2 x i8>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i8(<vscale x 2 x i8> %x, <vscale x 2 x i8> %y)
36  %b = extractvalue { <vscale x 2 x i8>, <vscale x 2 x i1> } %a, 0
37  %c = extractvalue { <vscale x 2 x i8>, <vscale x 2 x i1> } %a, 1
38  %d = select <vscale x 2 x i1> %c, <vscale x 2 x i8> zeroinitializer, <vscale x 2 x i8> %b
39  ret <vscale x 2 x i8> %d
40}
41
42declare { <vscale x 4 x i8>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i8>)
43
44define <vscale x 4 x i8> @smulo_nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y) {
45; CHECK-LABEL: smulo_nxv4i8:
46; CHECK:       # %bb.0:
47; CHECK-NEXT:    vsetvli a0, zero, e8, mf2, ta, ma
48; CHECK-NEXT:    vmulh.vv v10, v8, v9
49; CHECK-NEXT:    vmul.vv v8, v8, v9
50; CHECK-NEXT:    vsra.vi v9, v8, 7
51; CHECK-NEXT:    vmsne.vv v0, v10, v9
52; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
53; CHECK-NEXT:    ret
54  %a = call { <vscale x 4 x i8>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i8(<vscale x 4 x i8> %x, <vscale x 4 x i8> %y)
55  %b = extractvalue { <vscale x 4 x i8>, <vscale x 4 x i1> } %a, 0
56  %c = extractvalue { <vscale x 4 x i8>, <vscale x 4 x i1> } %a, 1
57  %d = select <vscale x 4 x i1> %c, <vscale x 4 x i8> zeroinitializer, <vscale x 4 x i8> %b
58  ret <vscale x 4 x i8> %d
59}
60
61declare { <vscale x 8 x i8>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i8(<vscale x 8 x i8>, <vscale x 8 x i8>)
62
63define <vscale x 8 x i8> @smulo_nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y) {
64; CHECK-LABEL: smulo_nxv8i8:
65; CHECK:       # %bb.0:
66; CHECK-NEXT:    vsetvli a0, zero, e8, m1, ta, ma
67; CHECK-NEXT:    vmulh.vv v10, v8, v9
68; CHECK-NEXT:    vmul.vv v8, v8, v9
69; CHECK-NEXT:    vsra.vi v9, v8, 7
70; CHECK-NEXT:    vmsne.vv v0, v10, v9
71; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
72; CHECK-NEXT:    ret
73  %a = call { <vscale x 8 x i8>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i8(<vscale x 8 x i8> %x, <vscale x 8 x i8> %y)
74  %b = extractvalue { <vscale x 8 x i8>, <vscale x 8 x i1> } %a, 0
75  %c = extractvalue { <vscale x 8 x i8>, <vscale x 8 x i1> } %a, 1
76  %d = select <vscale x 8 x i1> %c, <vscale x 8 x i8> zeroinitializer, <vscale x 8 x i8> %b
77  ret <vscale x 8 x i8> %d
78}
79
80declare { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>)
81
82define <vscale x 16 x i8> @smulo_nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y) {
83; CHECK-LABEL: smulo_nxv16i8:
84; CHECK:       # %bb.0:
85; CHECK-NEXT:    vsetvli a0, zero, e8, m2, ta, ma
86; CHECK-NEXT:    vmulh.vv v12, v8, v10
87; CHECK-NEXT:    vmul.vv v8, v8, v10
88; CHECK-NEXT:    vsra.vi v10, v8, 7
89; CHECK-NEXT:    vmsne.vv v0, v12, v10
90; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
91; CHECK-NEXT:    ret
92  %a = call { <vscale x 16 x i8>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i8(<vscale x 16 x i8> %x, <vscale x 16 x i8> %y)
93  %b = extractvalue { <vscale x 16 x i8>, <vscale x 16 x i1> } %a, 0
94  %c = extractvalue { <vscale x 16 x i8>, <vscale x 16 x i1> } %a, 1
95  %d = select <vscale x 16 x i1> %c, <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i8> %b
96  ret <vscale x 16 x i8> %d
97}
98
99declare { <vscale x 32 x i8>, <vscale x 32 x i1> } @llvm.smul.with.overflow.nxv32i8(<vscale x 32 x i8>, <vscale x 32 x i8>)
100
101define <vscale x 32 x i8> @smulo_nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y) {
102; CHECK-LABEL: smulo_nxv32i8:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    vsetvli a0, zero, e8, m4, ta, ma
105; CHECK-NEXT:    vmulh.vv v16, v8, v12
106; CHECK-NEXT:    vmul.vv v8, v8, v12
107; CHECK-NEXT:    vsra.vi v12, v8, 7
108; CHECK-NEXT:    vmsne.vv v0, v16, v12
109; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
110; CHECK-NEXT:    ret
111  %a = call { <vscale x 32 x i8>, <vscale x 32 x i1> } @llvm.smul.with.overflow.nxv32i8(<vscale x 32 x i8> %x, <vscale x 32 x i8> %y)
112  %b = extractvalue { <vscale x 32 x i8>, <vscale x 32 x i1> } %a, 0
113  %c = extractvalue { <vscale x 32 x i8>, <vscale x 32 x i1> } %a, 1
114  %d = select <vscale x 32 x i1> %c, <vscale x 32 x i8> zeroinitializer, <vscale x 32 x i8> %b
115  ret <vscale x 32 x i8> %d
116}
117
118declare { <vscale x 64 x i8>, <vscale x 64 x i1> } @llvm.smul.with.overflow.nxv64i8(<vscale x 64 x i8>, <vscale x 64 x i8>)
119
120define <vscale x 64 x i8> @smulo_nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y) {
121; CHECK-LABEL: smulo_nxv64i8:
122; CHECK:       # %bb.0:
123; CHECK-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
124; CHECK-NEXT:    vmulh.vv v24, v8, v16
125; CHECK-NEXT:    vmul.vv v8, v8, v16
126; CHECK-NEXT:    vsra.vi v16, v8, 7
127; CHECK-NEXT:    vmsne.vv v0, v24, v16
128; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
129; CHECK-NEXT:    ret
130  %a = call { <vscale x 64 x i8>, <vscale x 64 x i1> } @llvm.smul.with.overflow.nxv64i8(<vscale x 64 x i8> %x, <vscale x 64 x i8> %y)
131  %b = extractvalue { <vscale x 64 x i8>, <vscale x 64 x i1> } %a, 0
132  %c = extractvalue { <vscale x 64 x i8>, <vscale x 64 x i1> } %a, 1
133  %d = select <vscale x 64 x i1> %c, <vscale x 64 x i8> zeroinitializer, <vscale x 64 x i8> %b
134  ret <vscale x 64 x i8> %d
135}
136
137declare { <vscale x 1 x i16>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i16(<vscale x 1 x i16>, <vscale x 1 x i16>)
138
139define <vscale x 1 x i16> @smulo_nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y) {
140; CHECK-LABEL: smulo_nxv1i16:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    vsetvli a0, zero, e16, mf4, ta, ma
143; CHECK-NEXT:    vmulh.vv v10, v8, v9
144; CHECK-NEXT:    vmul.vv v8, v8, v9
145; CHECK-NEXT:    vsra.vi v9, v8, 15
146; CHECK-NEXT:    vmsne.vv v0, v10, v9
147; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
148; CHECK-NEXT:    ret
149  %a = call { <vscale x 1 x i16>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i16(<vscale x 1 x i16> %x, <vscale x 1 x i16> %y)
150  %b = extractvalue { <vscale x 1 x i16>, <vscale x 1 x i1> } %a, 0
151  %c = extractvalue { <vscale x 1 x i16>, <vscale x 1 x i1> } %a, 1
152  %d = select <vscale x 1 x i1> %c, <vscale x 1 x i16> zeroinitializer, <vscale x 1 x i16> %b
153  ret <vscale x 1 x i16> %d
154}
155
156declare { <vscale x 2 x i16>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16>)
157
158define <vscale x 2 x i16> @smulo_nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y) {
159; CHECK-LABEL: smulo_nxv2i16:
160; CHECK:       # %bb.0:
161; CHECK-NEXT:    vsetvli a0, zero, e16, mf2, ta, ma
162; CHECK-NEXT:    vmulh.vv v10, v8, v9
163; CHECK-NEXT:    vmul.vv v8, v8, v9
164; CHECK-NEXT:    vsra.vi v9, v8, 15
165; CHECK-NEXT:    vmsne.vv v0, v10, v9
166; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
167; CHECK-NEXT:    ret
168  %a = call { <vscale x 2 x i16>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y)
169  %b = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i1> } %a, 0
170  %c = extractvalue { <vscale x 2 x i16>, <vscale x 2 x i1> } %a, 1
171  %d = select <vscale x 2 x i1> %c, <vscale x 2 x i16> zeroinitializer, <vscale x 2 x i16> %b
172  ret <vscale x 2 x i16> %d
173}
174
175declare { <vscale x 4 x i16>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i16>)
176
177define <vscale x 4 x i16> @smulo_nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y) {
178; CHECK-LABEL: smulo_nxv4i16:
179; CHECK:       # %bb.0:
180; CHECK-NEXT:    vsetvli a0, zero, e16, m1, ta, ma
181; CHECK-NEXT:    vmulh.vv v10, v8, v9
182; CHECK-NEXT:    vmul.vv v8, v8, v9
183; CHECK-NEXT:    vsra.vi v9, v8, 15
184; CHECK-NEXT:    vmsne.vv v0, v10, v9
185; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
186; CHECK-NEXT:    ret
187  %a = call { <vscale x 4 x i16>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i16(<vscale x 4 x i16> %x, <vscale x 4 x i16> %y)
188  %b = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i1> } %a, 0
189  %c = extractvalue { <vscale x 4 x i16>, <vscale x 4 x i1> } %a, 1
190  %d = select <vscale x 4 x i1> %c, <vscale x 4 x i16> zeroinitializer, <vscale x 4 x i16> %b
191  ret <vscale x 4 x i16> %d
192}
193
194declare { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>)
195
196define <vscale x 8 x i16> @smulo_nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y) {
197; CHECK-LABEL: smulo_nxv8i16:
198; CHECK:       # %bb.0:
199; CHECK-NEXT:    vsetvli a0, zero, e16, m2, ta, ma
200; CHECK-NEXT:    vmulh.vv v12, v8, v10
201; CHECK-NEXT:    vmul.vv v8, v8, v10
202; CHECK-NEXT:    vsra.vi v10, v8, 15
203; CHECK-NEXT:    vmsne.vv v0, v12, v10
204; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
205; CHECK-NEXT:    ret
206  %a = call { <vscale x 8 x i16>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i16(<vscale x 8 x i16> %x, <vscale x 8 x i16> %y)
207  %b = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i1> } %a, 0
208  %c = extractvalue { <vscale x 8 x i16>, <vscale x 8 x i1> } %a, 1
209  %d = select <vscale x 8 x i1> %c, <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i16> %b
210  ret <vscale x 8 x i16> %d
211}
212
213declare { <vscale x 16 x i16>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i16(<vscale x 16 x i16>, <vscale x 16 x i16>)
214
215define <vscale x 16 x i16> @smulo_nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y) {
216; CHECK-LABEL: smulo_nxv16i16:
217; CHECK:       # %bb.0:
218; CHECK-NEXT:    vsetvli a0, zero, e16, m4, ta, ma
219; CHECK-NEXT:    vmulh.vv v16, v8, v12
220; CHECK-NEXT:    vmul.vv v8, v8, v12
221; CHECK-NEXT:    vsra.vi v12, v8, 15
222; CHECK-NEXT:    vmsne.vv v0, v16, v12
223; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
224; CHECK-NEXT:    ret
225  %a = call { <vscale x 16 x i16>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i16(<vscale x 16 x i16> %x, <vscale x 16 x i16> %y)
226  %b = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i1> } %a, 0
227  %c = extractvalue { <vscale x 16 x i16>, <vscale x 16 x i1> } %a, 1
228  %d = select <vscale x 16 x i1> %c, <vscale x 16 x i16> zeroinitializer, <vscale x 16 x i16> %b
229  ret <vscale x 16 x i16> %d
230}
231
232declare { <vscale x 32 x i16>, <vscale x 32 x i1> } @llvm.smul.with.overflow.nxv32i16(<vscale x 32 x i16>, <vscale x 32 x i16>)
233
234define <vscale x 32 x i16> @smulo_nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y) {
235; CHECK-LABEL: smulo_nxv32i16:
236; CHECK:       # %bb.0:
237; CHECK-NEXT:    vsetvli a0, zero, e16, m8, ta, ma
238; CHECK-NEXT:    vmulh.vv v24, v8, v16
239; CHECK-NEXT:    vmul.vv v8, v8, v16
240; CHECK-NEXT:    vsra.vi v16, v8, 15
241; CHECK-NEXT:    vmsne.vv v0, v24, v16
242; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
243; CHECK-NEXT:    ret
244  %a = call { <vscale x 32 x i16>, <vscale x 32 x i1> } @llvm.smul.with.overflow.nxv32i16(<vscale x 32 x i16> %x, <vscale x 32 x i16> %y)
245  %b = extractvalue { <vscale x 32 x i16>, <vscale x 32 x i1> } %a, 0
246  %c = extractvalue { <vscale x 32 x i16>, <vscale x 32 x i1> } %a, 1
247  %d = select <vscale x 32 x i1> %c, <vscale x 32 x i16> zeroinitializer, <vscale x 32 x i16> %b
248  ret <vscale x 32 x i16> %d
249}
250
251declare { <vscale x 1 x i32>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i32(<vscale x 1 x i32>, <vscale x 1 x i32>)
252
253define <vscale x 1 x i32> @smulo_nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y) {
254; CHECK-LABEL: smulo_nxv1i32:
255; CHECK:       # %bb.0:
256; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, ma
257; CHECK-NEXT:    vmulh.vv v10, v8, v9
258; CHECK-NEXT:    vmul.vv v8, v8, v9
259; CHECK-NEXT:    vsra.vi v9, v8, 31
260; CHECK-NEXT:    vmsne.vv v0, v10, v9
261; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
262; CHECK-NEXT:    ret
263  %a = call { <vscale x 1 x i32>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i32(<vscale x 1 x i32> %x, <vscale x 1 x i32> %y)
264  %b = extractvalue { <vscale x 1 x i32>, <vscale x 1 x i1> } %a, 0
265  %c = extractvalue { <vscale x 1 x i32>, <vscale x 1 x i1> } %a, 1
266  %d = select <vscale x 1 x i1> %c, <vscale x 1 x i32> zeroinitializer, <vscale x 1 x i32> %b
267  ret <vscale x 1 x i32> %d
268}
269
270declare { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32>)
271
272define <vscale x 2 x i32> @smulo_nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) {
273; CHECK-LABEL: smulo_nxv2i32:
274; CHECK:       # %bb.0:
275; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
276; CHECK-NEXT:    vmulh.vv v10, v8, v9
277; CHECK-NEXT:    vmul.vv v8, v8, v9
278; CHECK-NEXT:    vsra.vi v9, v8, 31
279; CHECK-NEXT:    vmsne.vv v0, v10, v9
280; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
281; CHECK-NEXT:    ret
282  %a = call { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y)
283  %b = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 0
284  %c = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 1
285  %d = select <vscale x 2 x i1> %c, <vscale x 2 x i32> zeroinitializer, <vscale x 2 x i32> %b
286  ret <vscale x 2 x i32> %d
287}
288
289declare { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>)
290
291define <vscale x 4 x i32> @smulo_nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y) {
292; CHECK-LABEL: smulo_nxv4i32:
293; CHECK:       # %bb.0:
294; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, ma
295; CHECK-NEXT:    vmulh.vv v12, v8, v10
296; CHECK-NEXT:    vmul.vv v8, v8, v10
297; CHECK-NEXT:    vsra.vi v10, v8, 31
298; CHECK-NEXT:    vmsne.vv v0, v12, v10
299; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
300; CHECK-NEXT:    ret
301  %a = call { <vscale x 4 x i32>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i32(<vscale x 4 x i32> %x, <vscale x 4 x i32> %y)
302  %b = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i1> } %a, 0
303  %c = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i1> } %a, 1
304  %d = select <vscale x 4 x i1> %c, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> %b
305  ret <vscale x 4 x i32> %d
306}
307
308declare { <vscale x 8 x i32>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i32(<vscale x 8 x i32>, <vscale x 8 x i32>)
309
310define <vscale x 8 x i32> @smulo_nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y) {
311; CHECK-LABEL: smulo_nxv8i32:
312; CHECK:       # %bb.0:
313; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
314; CHECK-NEXT:    vmulh.vv v16, v8, v12
315; CHECK-NEXT:    vmul.vv v8, v8, v12
316; CHECK-NEXT:    vsra.vi v12, v8, 31
317; CHECK-NEXT:    vmsne.vv v0, v16, v12
318; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
319; CHECK-NEXT:    ret
320  %a = call { <vscale x 8 x i32>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i32(<vscale x 8 x i32> %x, <vscale x 8 x i32> %y)
321  %b = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i1> } %a, 0
322  %c = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i1> } %a, 1
323  %d = select <vscale x 8 x i1> %c, <vscale x 8 x i32> zeroinitializer, <vscale x 8 x i32> %b
324  ret <vscale x 8 x i32> %d
325}
326
327declare { <vscale x 16 x i32>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i32(<vscale x 16 x i32>, <vscale x 16 x i32>)
328
329define <vscale x 16 x i32> @smulo_nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y) {
330; CHECK-LABEL: smulo_nxv16i32:
331; CHECK:       # %bb.0:
332; CHECK-NEXT:    vsetvli a0, zero, e32, m8, ta, ma
333; CHECK-NEXT:    vmulh.vv v24, v8, v16
334; CHECK-NEXT:    vmul.vv v8, v8, v16
335; CHECK-NEXT:    vsra.vi v16, v8, 31
336; CHECK-NEXT:    vmsne.vv v0, v24, v16
337; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
338; CHECK-NEXT:    ret
339  %a = call { <vscale x 16 x i32>, <vscale x 16 x i1> } @llvm.smul.with.overflow.nxv16i32(<vscale x 16 x i32> %x, <vscale x 16 x i32> %y)
340  %b = extractvalue { <vscale x 16 x i32>, <vscale x 16 x i1> } %a, 0
341  %c = extractvalue { <vscale x 16 x i32>, <vscale x 16 x i1> } %a, 1
342  %d = select <vscale x 16 x i1> %c, <vscale x 16 x i32> zeroinitializer, <vscale x 16 x i32> %b
343  ret <vscale x 16 x i32> %d
344}
345
346declare { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64>, <vscale x 1 x i64>)
347
348define <vscale x 1 x i64> @smulo_nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y) {
349; CHECK-LABEL: smulo_nxv1i64:
350; CHECK:       # %bb.0:
351; CHECK-NEXT:    vsetvli a0, zero, e64, m1, ta, ma
352; CHECK-NEXT:    vmulh.vv v10, v8, v9
353; CHECK-NEXT:    vmul.vv v8, v8, v9
354; CHECK-NEXT:    li a0, 63
355; CHECK-NEXT:    vsra.vx v9, v8, a0
356; CHECK-NEXT:    vmsne.vv v0, v10, v9
357; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
358; CHECK-NEXT:    ret
359  %a = call { <vscale x 1 x i64>, <vscale x 1 x i1> } @llvm.smul.with.overflow.nxv1i64(<vscale x 1 x i64> %x, <vscale x 1 x i64> %y)
360  %b = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i1> } %a, 0
361  %c = extractvalue { <vscale x 1 x i64>, <vscale x 1 x i1> } %a, 1
362  %d = select <vscale x 1 x i1> %c, <vscale x 1 x i64> zeroinitializer, <vscale x 1 x i64> %b
363  ret <vscale x 1 x i64> %d
364}
365
366declare { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>)
367
368define <vscale x 2 x i64> @smulo_nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
369; CHECK-LABEL: smulo_nxv2i64:
370; CHECK:       # %bb.0:
371; CHECK-NEXT:    vsetvli a0, zero, e64, m2, ta, ma
372; CHECK-NEXT:    vmulh.vv v12, v8, v10
373; CHECK-NEXT:    vmul.vv v8, v8, v10
374; CHECK-NEXT:    li a0, 63
375; CHECK-NEXT:    vsra.vx v10, v8, a0
376; CHECK-NEXT:    vmsne.vv v0, v12, v10
377; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
378; CHECK-NEXT:    ret
379  %a = call { <vscale x 2 x i64>, <vscale x 2 x i1> } @llvm.smul.with.overflow.nxv2i64(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y)
380  %b = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i1> } %a, 0
381  %c = extractvalue { <vscale x 2 x i64>, <vscale x 2 x i1> } %a, 1
382  %d = select <vscale x 2 x i1> %c, <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i64> %b
383  ret <vscale x 2 x i64> %d
384}
385
386declare { <vscale x 4 x i64>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i64(<vscale x 4 x i64>, <vscale x 4 x i64>)
387
388define <vscale x 4 x i64> @smulo_nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y) {
389; CHECK-LABEL: smulo_nxv4i64:
390; CHECK:       # %bb.0:
391; CHECK-NEXT:    vsetvli a0, zero, e64, m4, ta, ma
392; CHECK-NEXT:    vmulh.vv v16, v8, v12
393; CHECK-NEXT:    vmul.vv v8, v8, v12
394; CHECK-NEXT:    li a0, 63
395; CHECK-NEXT:    vsra.vx v12, v8, a0
396; CHECK-NEXT:    vmsne.vv v0, v16, v12
397; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
398; CHECK-NEXT:    ret
399  %a = call { <vscale x 4 x i64>, <vscale x 4 x i1> } @llvm.smul.with.overflow.nxv4i64(<vscale x 4 x i64> %x, <vscale x 4 x i64> %y)
400  %b = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i1> } %a, 0
401  %c = extractvalue { <vscale x 4 x i64>, <vscale x 4 x i1> } %a, 1
402  %d = select <vscale x 4 x i1> %c, <vscale x 4 x i64> zeroinitializer, <vscale x 4 x i64> %b
403  ret <vscale x 4 x i64> %d
404}
405
406declare { <vscale x 8 x i64>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i64(<vscale x 8 x i64>, <vscale x 8 x i64>)
407
408define <vscale x 8 x i64> @smulo_nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y) {
409; CHECK-LABEL: smulo_nxv8i64:
410; CHECK:       # %bb.0:
411; CHECK-NEXT:    vsetvli a0, zero, e64, m8, ta, ma
412; CHECK-NEXT:    vmulh.vv v24, v8, v16
413; CHECK-NEXT:    vmul.vv v8, v8, v16
414; CHECK-NEXT:    li a0, 63
415; CHECK-NEXT:    vsra.vx v16, v8, a0
416; CHECK-NEXT:    vmsne.vv v0, v24, v16
417; CHECK-NEXT:    vmerge.vim v8, v8, 0, v0
418; CHECK-NEXT:    ret
419  %a = call { <vscale x 8 x i64>, <vscale x 8 x i1> } @llvm.smul.with.overflow.nxv8i64(<vscale x 8 x i64> %x, <vscale x 8 x i64> %y)
420  %b = extractvalue { <vscale x 8 x i64>, <vscale x 8 x i1> } %a, 0
421  %c = extractvalue { <vscale x 8 x i64>, <vscale x 8 x i1> } %a, 1
422  %d = select <vscale x 8 x i1> %c, <vscale x 8 x i64> zeroinitializer, <vscale x 8 x i64> %b
423  ret <vscale x 8 x i64> %d
424}
425