1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc < %s -mtriple=riscv64 -mattr=+v -stop-after=finalize-isel | FileCheck %s 3 4; Make sure we don't create a COPY instruction for IMPLICIT_DEF. 5 6define <vscale x 8 x i64> @vpload_nxv8i64(ptr %ptr, <vscale x 8 x i1> %m, i32 zeroext %evl) #1 { 7 ; CHECK-LABEL: name: vpload_nxv8i64 8 ; CHECK: bb.0 (%ir-block.0): 9 ; CHECK-NEXT: liveins: $x10, $v0, $x11 10 ; CHECK-NEXT: {{ $}} 11 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnox0 = COPY $x11 12 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vr = COPY $v0 13 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr = COPY $x10 14 ; CHECK-NEXT: $v0 = COPY [[COPY1]] 15 ; CHECK-NEXT: [[PseudoVLE64_V_M8_MASK:%[0-9]+]]:vrm8nov0 = PseudoVLE64_V_M8_MASK $noreg, [[COPY2]], $v0, [[COPY]], 6 /* e64 */, 1 /* ta, mu */ :: (load unknown-size from %ir.ptr, align 64) 16 ; CHECK-NEXT: $v8m8 = COPY [[PseudoVLE64_V_M8_MASK]] 17 ; CHECK-NEXT: PseudoRET implicit $v8m8 18 %load = call <vscale x 8 x i64> @llvm.vp.load.nxv8i64.p0(ptr %ptr, <vscale x 8 x i1> %m, i32 %evl) 19 ret <vscale x 8 x i64> %load 20} 21 22declare <vscale x 8 x i64> @llvm.vp.load.nxv8i64.p0(ptr, <vscale x 8 x i1>, i32) 23