xref: /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll (revision 97982a8c605fac7c86d02e641a6cd7898b3ca343) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s --check-prefixes=CHECK,RV64
6
7declare <8 x i7> @llvm.vp.sdiv.v8i7(<8 x i7>, <8 x i7>, <8 x i1>, i32)
8
9define <8 x i7> @vdiv_vv_v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 zeroext %evl) {
10; CHECK-LABEL: vdiv_vv_v8i7:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
13; CHECK-NEXT:    vsll.vi v9, v9, 1, v0.t
14; CHECK-NEXT:    vsra.vi v9, v9, 1, v0.t
15; CHECK-NEXT:    vsll.vi v8, v8, 1, v0.t
16; CHECK-NEXT:    vsra.vi v8, v8, 1, v0.t
17; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
18; CHECK-NEXT:    ret
19  %v = call <8 x i7> @llvm.vp.sdiv.v8i7(<8 x i7> %va, <8 x i7> %b, <8 x i1> %m, i32 %evl)
20  ret <8 x i7> %v
21}
22
23declare <2 x i8> @llvm.vp.sdiv.v2i8(<2 x i8>, <2 x i8>, <2 x i1>, i32)
24
25define <2 x i8> @vdiv_vv_v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 zeroext %evl) {
26; CHECK-LABEL: vdiv_vv_v2i8:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
29; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
30; CHECK-NEXT:    ret
31  %v = call <2 x i8> @llvm.vp.sdiv.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> %m, i32 %evl)
32  ret <2 x i8> %v
33}
34
35define <2 x i8> @vdiv_vv_v2i8_unmasked(<2 x i8> %va, <2 x i8> %b, i32 zeroext %evl) {
36; CHECK-LABEL: vdiv_vv_v2i8_unmasked:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    vsetvli zero, a0, e8, mf8, ta, ma
39; CHECK-NEXT:    vdiv.vv v8, v8, v9
40; CHECK-NEXT:    ret
41  %v = call <2 x i8> @llvm.vp.sdiv.v2i8(<2 x i8> %va, <2 x i8> %b, <2 x i1> splat (i1 true), i32 %evl)
42  ret <2 x i8> %v
43}
44
45define <2 x i8> @vdiv_vx_v2i8(<2 x i8> %va, i8 %b, <2 x i1> %m, i32 zeroext %evl) {
46; CHECK-LABEL: vdiv_vx_v2i8:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
49; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
50; CHECK-NEXT:    ret
51  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 0
52  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer
53  %v = call <2 x i8> @llvm.vp.sdiv.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> %m, i32 %evl)
54  ret <2 x i8> %v
55}
56
57define <2 x i8> @vdiv_vx_v2i8_unmasked(<2 x i8> %va, i8 %b, i32 zeroext %evl) {
58; CHECK-LABEL: vdiv_vx_v2i8_unmasked:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    vsetvli zero, a1, e8, mf8, ta, ma
61; CHECK-NEXT:    vdiv.vx v8, v8, a0
62; CHECK-NEXT:    ret
63  %elt.head = insertelement <2 x i8> poison, i8 %b, i32 0
64  %vb = shufflevector <2 x i8> %elt.head, <2 x i8> poison, <2 x i32> zeroinitializer
65  %v = call <2 x i8> @llvm.vp.sdiv.v2i8(<2 x i8> %va, <2 x i8> %vb, <2 x i1> splat (i1 true), i32 %evl)
66  ret <2 x i8> %v
67}
68
69declare <4 x i8> @llvm.vp.sdiv.v4i8(<4 x i8>, <4 x i8>, <4 x i1>, i32)
70
71define <4 x i8> @vdiv_vv_v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 zeroext %evl) {
72; CHECK-LABEL: vdiv_vv_v4i8:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
75; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
76; CHECK-NEXT:    ret
77  %v = call <4 x i8> @llvm.vp.sdiv.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> %m, i32 %evl)
78  ret <4 x i8> %v
79}
80
81define <4 x i8> @vdiv_vv_v4i8_unmasked(<4 x i8> %va, <4 x i8> %b, i32 zeroext %evl) {
82; CHECK-LABEL: vdiv_vv_v4i8_unmasked:
83; CHECK:       # %bb.0:
84; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
85; CHECK-NEXT:    vdiv.vv v8, v8, v9
86; CHECK-NEXT:    ret
87  %v = call <4 x i8> @llvm.vp.sdiv.v4i8(<4 x i8> %va, <4 x i8> %b, <4 x i1> splat (i1 true), i32 %evl)
88  ret <4 x i8> %v
89}
90
91define <4 x i8> @vdiv_vx_v4i8(<4 x i8> %va, i8 %b, <4 x i1> %m, i32 zeroext %evl) {
92; CHECK-LABEL: vdiv_vx_v4i8:
93; CHECK:       # %bb.0:
94; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
95; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
96; CHECK-NEXT:    ret
97  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0
98  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer
99  %v = call <4 x i8> @llvm.vp.sdiv.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> %m, i32 %evl)
100  ret <4 x i8> %v
101}
102
103define <4 x i8> @vdiv_vx_v4i8_unmasked(<4 x i8> %va, i8 %b, i32 zeroext %evl) {
104; CHECK-LABEL: vdiv_vx_v4i8_unmasked:
105; CHECK:       # %bb.0:
106; CHECK-NEXT:    vsetvli zero, a1, e8, mf4, ta, ma
107; CHECK-NEXT:    vdiv.vx v8, v8, a0
108; CHECK-NEXT:    ret
109  %elt.head = insertelement <4 x i8> poison, i8 %b, i32 0
110  %vb = shufflevector <4 x i8> %elt.head, <4 x i8> poison, <4 x i32> zeroinitializer
111  %v = call <4 x i8> @llvm.vp.sdiv.v4i8(<4 x i8> %va, <4 x i8> %vb, <4 x i1> splat (i1 true), i32 %evl)
112  ret <4 x i8> %v
113}
114
115declare <6 x i8> @llvm.vp.sdiv.v6i8(<6 x i8>, <6 x i8>, <6 x i1>, i32)
116
117define <6 x i8> @vdiv_vv_v6i8(<6 x i8> %va, <6 x i8> %b, <6 x i1> %m, i32 zeroext %evl) {
118; CHECK-LABEL: vdiv_vv_v6i8:
119; CHECK:       # %bb.0:
120; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
121; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
122; CHECK-NEXT:    ret
123  %v = call <6 x i8> @llvm.vp.sdiv.v6i8(<6 x i8> %va, <6 x i8> %b, <6 x i1> %m, i32 %evl)
124  ret <6 x i8> %v
125}
126
127declare <8 x i8> @llvm.vp.sdiv.v8i8(<8 x i8>, <8 x i8>, <8 x i1>, i32)
128
129define <8 x i8> @vdiv_vv_v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 zeroext %evl) {
130; CHECK-LABEL: vdiv_vv_v8i8:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
133; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
134; CHECK-NEXT:    ret
135  %v = call <8 x i8> @llvm.vp.sdiv.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> %m, i32 %evl)
136  ret <8 x i8> %v
137}
138
139define <8 x i8> @vdiv_vv_v8i8_unmasked(<8 x i8> %va, <8 x i8> %b, i32 zeroext %evl) {
140; CHECK-LABEL: vdiv_vv_v8i8_unmasked:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
143; CHECK-NEXT:    vdiv.vv v8, v8, v9
144; CHECK-NEXT:    ret
145  %v = call <8 x i8> @llvm.vp.sdiv.v8i8(<8 x i8> %va, <8 x i8> %b, <8 x i1> splat (i1 true), i32 %evl)
146  ret <8 x i8> %v
147}
148
149define <8 x i8> @vdiv_vx_v8i8(<8 x i8> %va, i8 %b, <8 x i1> %m, i32 zeroext %evl) {
150; CHECK-LABEL: vdiv_vx_v8i8:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
153; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
154; CHECK-NEXT:    ret
155  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
156  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
157  %v = call <8 x i8> @llvm.vp.sdiv.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> %m, i32 %evl)
158  ret <8 x i8> %v
159}
160
161define <8 x i8> @vdiv_vx_v8i8_unmasked(<8 x i8> %va, i8 %b, i32 zeroext %evl) {
162; CHECK-LABEL: vdiv_vx_v8i8_unmasked:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    vsetvli zero, a1, e8, mf2, ta, ma
165; CHECK-NEXT:    vdiv.vx v8, v8, a0
166; CHECK-NEXT:    ret
167  %elt.head = insertelement <8 x i8> poison, i8 %b, i32 0
168  %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer
169  %v = call <8 x i8> @llvm.vp.sdiv.v8i8(<8 x i8> %va, <8 x i8> %vb, <8 x i1> splat (i1 true), i32 %evl)
170  ret <8 x i8> %v
171}
172
173declare <16 x i8> @llvm.vp.sdiv.v16i8(<16 x i8>, <16 x i8>, <16 x i1>, i32)
174
175define <16 x i8> @vdiv_vv_v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 zeroext %evl) {
176; CHECK-LABEL: vdiv_vv_v16i8:
177; CHECK:       # %bb.0:
178; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
179; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
180; CHECK-NEXT:    ret
181  %v = call <16 x i8> @llvm.vp.sdiv.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> %m, i32 %evl)
182  ret <16 x i8> %v
183}
184
185define <16 x i8> @vdiv_vv_v16i8_unmasked(<16 x i8> %va, <16 x i8> %b, i32 zeroext %evl) {
186; CHECK-LABEL: vdiv_vv_v16i8_unmasked:
187; CHECK:       # %bb.0:
188; CHECK-NEXT:    vsetvli zero, a0, e8, m1, ta, ma
189; CHECK-NEXT:    vdiv.vv v8, v8, v9
190; CHECK-NEXT:    ret
191  %v = call <16 x i8> @llvm.vp.sdiv.v16i8(<16 x i8> %va, <16 x i8> %b, <16 x i1> splat (i1 true), i32 %evl)
192  ret <16 x i8> %v
193}
194
195define <16 x i8> @vdiv_vx_v16i8(<16 x i8> %va, i8 %b, <16 x i1> %m, i32 zeroext %evl) {
196; CHECK-LABEL: vdiv_vx_v16i8:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
199; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
200; CHECK-NEXT:    ret
201  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0
202  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer
203  %v = call <16 x i8> @llvm.vp.sdiv.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> %m, i32 %evl)
204  ret <16 x i8> %v
205}
206
207define <16 x i8> @vdiv_vx_v16i8_unmasked(<16 x i8> %va, i8 %b, i32 zeroext %evl) {
208; CHECK-LABEL: vdiv_vx_v16i8_unmasked:
209; CHECK:       # %bb.0:
210; CHECK-NEXT:    vsetvli zero, a1, e8, m1, ta, ma
211; CHECK-NEXT:    vdiv.vx v8, v8, a0
212; CHECK-NEXT:    ret
213  %elt.head = insertelement <16 x i8> poison, i8 %b, i32 0
214  %vb = shufflevector <16 x i8> %elt.head, <16 x i8> poison, <16 x i32> zeroinitializer
215  %v = call <16 x i8> @llvm.vp.sdiv.v16i8(<16 x i8> %va, <16 x i8> %vb, <16 x i1> splat (i1 true), i32 %evl)
216  ret <16 x i8> %v
217}
218
219declare <2 x i16> @llvm.vp.sdiv.v2i16(<2 x i16>, <2 x i16>, <2 x i1>, i32)
220
221define <2 x i16> @vdiv_vv_v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 zeroext %evl) {
222; CHECK-LABEL: vdiv_vv_v2i16:
223; CHECK:       # %bb.0:
224; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
225; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
226; CHECK-NEXT:    ret
227  %v = call <2 x i16> @llvm.vp.sdiv.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> %m, i32 %evl)
228  ret <2 x i16> %v
229}
230
231define <2 x i16> @vdiv_vv_v2i16_unmasked(<2 x i16> %va, <2 x i16> %b, i32 zeroext %evl) {
232; CHECK-LABEL: vdiv_vv_v2i16_unmasked:
233; CHECK:       # %bb.0:
234; CHECK-NEXT:    vsetvli zero, a0, e16, mf4, ta, ma
235; CHECK-NEXT:    vdiv.vv v8, v8, v9
236; CHECK-NEXT:    ret
237  %v = call <2 x i16> @llvm.vp.sdiv.v2i16(<2 x i16> %va, <2 x i16> %b, <2 x i1> splat (i1 true), i32 %evl)
238  ret <2 x i16> %v
239}
240
241define <2 x i16> @vdiv_vx_v2i16(<2 x i16> %va, i16 %b, <2 x i1> %m, i32 zeroext %evl) {
242; CHECK-LABEL: vdiv_vx_v2i16:
243; CHECK:       # %bb.0:
244; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
245; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
246; CHECK-NEXT:    ret
247  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0
248  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer
249  %v = call <2 x i16> @llvm.vp.sdiv.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> %m, i32 %evl)
250  ret <2 x i16> %v
251}
252
253define <2 x i16> @vdiv_vx_v2i16_unmasked(<2 x i16> %va, i16 %b, i32 zeroext %evl) {
254; CHECK-LABEL: vdiv_vx_v2i16_unmasked:
255; CHECK:       # %bb.0:
256; CHECK-NEXT:    vsetvli zero, a1, e16, mf4, ta, ma
257; CHECK-NEXT:    vdiv.vx v8, v8, a0
258; CHECK-NEXT:    ret
259  %elt.head = insertelement <2 x i16> poison, i16 %b, i32 0
260  %vb = shufflevector <2 x i16> %elt.head, <2 x i16> poison, <2 x i32> zeroinitializer
261  %v = call <2 x i16> @llvm.vp.sdiv.v2i16(<2 x i16> %va, <2 x i16> %vb, <2 x i1> splat (i1 true), i32 %evl)
262  ret <2 x i16> %v
263}
264
265declare <4 x i16> @llvm.vp.sdiv.v4i16(<4 x i16>, <4 x i16>, <4 x i1>, i32)
266
267define <4 x i16> @vdiv_vv_v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 zeroext %evl) {
268; CHECK-LABEL: vdiv_vv_v4i16:
269; CHECK:       # %bb.0:
270; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
271; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
272; CHECK-NEXT:    ret
273  %v = call <4 x i16> @llvm.vp.sdiv.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> %m, i32 %evl)
274  ret <4 x i16> %v
275}
276
277define <4 x i16> @vdiv_vv_v4i16_unmasked(<4 x i16> %va, <4 x i16> %b, i32 zeroext %evl) {
278; CHECK-LABEL: vdiv_vv_v4i16_unmasked:
279; CHECK:       # %bb.0:
280; CHECK-NEXT:    vsetvli zero, a0, e16, mf2, ta, ma
281; CHECK-NEXT:    vdiv.vv v8, v8, v9
282; CHECK-NEXT:    ret
283  %v = call <4 x i16> @llvm.vp.sdiv.v4i16(<4 x i16> %va, <4 x i16> %b, <4 x i1> splat (i1 true), i32 %evl)
284  ret <4 x i16> %v
285}
286
287define <4 x i16> @vdiv_vx_v4i16(<4 x i16> %va, i16 %b, <4 x i1> %m, i32 zeroext %evl) {
288; CHECK-LABEL: vdiv_vx_v4i16:
289; CHECK:       # %bb.0:
290; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
291; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
292; CHECK-NEXT:    ret
293  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0
294  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer
295  %v = call <4 x i16> @llvm.vp.sdiv.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> %m, i32 %evl)
296  ret <4 x i16> %v
297}
298
299define <4 x i16> @vdiv_vx_v4i16_unmasked(<4 x i16> %va, i16 %b, i32 zeroext %evl) {
300; CHECK-LABEL: vdiv_vx_v4i16_unmasked:
301; CHECK:       # %bb.0:
302; CHECK-NEXT:    vsetvli zero, a1, e16, mf2, ta, ma
303; CHECK-NEXT:    vdiv.vx v8, v8, a0
304; CHECK-NEXT:    ret
305  %elt.head = insertelement <4 x i16> poison, i16 %b, i32 0
306  %vb = shufflevector <4 x i16> %elt.head, <4 x i16> poison, <4 x i32> zeroinitializer
307  %v = call <4 x i16> @llvm.vp.sdiv.v4i16(<4 x i16> %va, <4 x i16> %vb, <4 x i1> splat (i1 true), i32 %evl)
308  ret <4 x i16> %v
309}
310
311declare <8 x i16> @llvm.vp.sdiv.v8i16(<8 x i16>, <8 x i16>, <8 x i1>, i32)
312
313define <8 x i16> @vdiv_vv_v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 zeroext %evl) {
314; CHECK-LABEL: vdiv_vv_v8i16:
315; CHECK:       # %bb.0:
316; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
317; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
318; CHECK-NEXT:    ret
319  %v = call <8 x i16> @llvm.vp.sdiv.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> %m, i32 %evl)
320  ret <8 x i16> %v
321}
322
323define <8 x i16> @vdiv_vv_v8i16_unmasked(<8 x i16> %va, <8 x i16> %b, i32 zeroext %evl) {
324; CHECK-LABEL: vdiv_vv_v8i16_unmasked:
325; CHECK:       # %bb.0:
326; CHECK-NEXT:    vsetvli zero, a0, e16, m1, ta, ma
327; CHECK-NEXT:    vdiv.vv v8, v8, v9
328; CHECK-NEXT:    ret
329  %v = call <8 x i16> @llvm.vp.sdiv.v8i16(<8 x i16> %va, <8 x i16> %b, <8 x i1> splat (i1 true), i32 %evl)
330  ret <8 x i16> %v
331}
332
333define <8 x i16> @vdiv_vx_v8i16(<8 x i16> %va, i16 %b, <8 x i1> %m, i32 zeroext %evl) {
334; CHECK-LABEL: vdiv_vx_v8i16:
335; CHECK:       # %bb.0:
336; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
337; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
338; CHECK-NEXT:    ret
339  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0
340  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer
341  %v = call <8 x i16> @llvm.vp.sdiv.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> %m, i32 %evl)
342  ret <8 x i16> %v
343}
344
345define <8 x i16> @vdiv_vx_v8i16_unmasked(<8 x i16> %va, i16 %b, i32 zeroext %evl) {
346; CHECK-LABEL: vdiv_vx_v8i16_unmasked:
347; CHECK:       # %bb.0:
348; CHECK-NEXT:    vsetvli zero, a1, e16, m1, ta, ma
349; CHECK-NEXT:    vdiv.vx v8, v8, a0
350; CHECK-NEXT:    ret
351  %elt.head = insertelement <8 x i16> poison, i16 %b, i32 0
352  %vb = shufflevector <8 x i16> %elt.head, <8 x i16> poison, <8 x i32> zeroinitializer
353  %v = call <8 x i16> @llvm.vp.sdiv.v8i16(<8 x i16> %va, <8 x i16> %vb, <8 x i1> splat (i1 true), i32 %evl)
354  ret <8 x i16> %v
355}
356
357declare <16 x i16> @llvm.vp.sdiv.v16i16(<16 x i16>, <16 x i16>, <16 x i1>, i32)
358
359define <16 x i16> @vdiv_vv_v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 zeroext %evl) {
360; CHECK-LABEL: vdiv_vv_v16i16:
361; CHECK:       # %bb.0:
362; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
363; CHECK-NEXT:    vdiv.vv v8, v8, v10, v0.t
364; CHECK-NEXT:    ret
365  %v = call <16 x i16> @llvm.vp.sdiv.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> %m, i32 %evl)
366  ret <16 x i16> %v
367}
368
369define <16 x i16> @vdiv_vv_v16i16_unmasked(<16 x i16> %va, <16 x i16> %b, i32 zeroext %evl) {
370; CHECK-LABEL: vdiv_vv_v16i16_unmasked:
371; CHECK:       # %bb.0:
372; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
373; CHECK-NEXT:    vdiv.vv v8, v8, v10
374; CHECK-NEXT:    ret
375  %v = call <16 x i16> @llvm.vp.sdiv.v16i16(<16 x i16> %va, <16 x i16> %b, <16 x i1> splat (i1 true), i32 %evl)
376  ret <16 x i16> %v
377}
378
379define <16 x i16> @vdiv_vx_v16i16(<16 x i16> %va, i16 %b, <16 x i1> %m, i32 zeroext %evl) {
380; CHECK-LABEL: vdiv_vx_v16i16:
381; CHECK:       # %bb.0:
382; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
383; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
384; CHECK-NEXT:    ret
385  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0
386  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer
387  %v = call <16 x i16> @llvm.vp.sdiv.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> %m, i32 %evl)
388  ret <16 x i16> %v
389}
390
391define <16 x i16> @vdiv_vx_v16i16_unmasked(<16 x i16> %va, i16 %b, i32 zeroext %evl) {
392; CHECK-LABEL: vdiv_vx_v16i16_unmasked:
393; CHECK:       # %bb.0:
394; CHECK-NEXT:    vsetvli zero, a1, e16, m2, ta, ma
395; CHECK-NEXT:    vdiv.vx v8, v8, a0
396; CHECK-NEXT:    ret
397  %elt.head = insertelement <16 x i16> poison, i16 %b, i32 0
398  %vb = shufflevector <16 x i16> %elt.head, <16 x i16> poison, <16 x i32> zeroinitializer
399  %v = call <16 x i16> @llvm.vp.sdiv.v16i16(<16 x i16> %va, <16 x i16> %vb, <16 x i1> splat (i1 true), i32 %evl)
400  ret <16 x i16> %v
401}
402
403declare <2 x i32> @llvm.vp.sdiv.v2i32(<2 x i32>, <2 x i32>, <2 x i1>, i32)
404
405define <2 x i32> @vdiv_vv_v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 zeroext %evl) {
406; CHECK-LABEL: vdiv_vv_v2i32:
407; CHECK:       # %bb.0:
408; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
409; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
410; CHECK-NEXT:    ret
411  %v = call <2 x i32> @llvm.vp.sdiv.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> %m, i32 %evl)
412  ret <2 x i32> %v
413}
414
415define <2 x i32> @vdiv_vv_v2i32_unmasked(<2 x i32> %va, <2 x i32> %b, i32 zeroext %evl) {
416; CHECK-LABEL: vdiv_vv_v2i32_unmasked:
417; CHECK:       # %bb.0:
418; CHECK-NEXT:    vsetvli zero, a0, e32, mf2, ta, ma
419; CHECK-NEXT:    vdiv.vv v8, v8, v9
420; CHECK-NEXT:    ret
421  %v = call <2 x i32> @llvm.vp.sdiv.v2i32(<2 x i32> %va, <2 x i32> %b, <2 x i1> splat (i1 true), i32 %evl)
422  ret <2 x i32> %v
423}
424
425define <2 x i32> @vdiv_vx_v2i32(<2 x i32> %va, i32 %b, <2 x i1> %m, i32 zeroext %evl) {
426; CHECK-LABEL: vdiv_vx_v2i32:
427; CHECK:       # %bb.0:
428; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
429; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
430; CHECK-NEXT:    ret
431  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0
432  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer
433  %v = call <2 x i32> @llvm.vp.sdiv.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> %m, i32 %evl)
434  ret <2 x i32> %v
435}
436
437define <2 x i32> @vdiv_vx_v2i32_unmasked(<2 x i32> %va, i32 %b, i32 zeroext %evl) {
438; CHECK-LABEL: vdiv_vx_v2i32_unmasked:
439; CHECK:       # %bb.0:
440; CHECK-NEXT:    vsetvli zero, a1, e32, mf2, ta, ma
441; CHECK-NEXT:    vdiv.vx v8, v8, a0
442; CHECK-NEXT:    ret
443  %elt.head = insertelement <2 x i32> poison, i32 %b, i32 0
444  %vb = shufflevector <2 x i32> %elt.head, <2 x i32> poison, <2 x i32> zeroinitializer
445  %v = call <2 x i32> @llvm.vp.sdiv.v2i32(<2 x i32> %va, <2 x i32> %vb, <2 x i1> splat (i1 true), i32 %evl)
446  ret <2 x i32> %v
447}
448
449declare <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32>, <4 x i32>, <4 x i1>, i32)
450
451define <4 x i32> @vdiv_vv_v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 zeroext %evl) {
452; CHECK-LABEL: vdiv_vv_v4i32:
453; CHECK:       # %bb.0:
454; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
455; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
456; CHECK-NEXT:    ret
457  %v = call <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> %m, i32 %evl)
458  ret <4 x i32> %v
459}
460
461define <4 x i32> @vdiv_vv_v4i32_unmasked(<4 x i32> %va, <4 x i32> %b, i32 zeroext %evl) {
462; CHECK-LABEL: vdiv_vv_v4i32_unmasked:
463; CHECK:       # %bb.0:
464; CHECK-NEXT:    vsetvli zero, a0, e32, m1, ta, ma
465; CHECK-NEXT:    vdiv.vv v8, v8, v9
466; CHECK-NEXT:    ret
467  %v = call <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32> %va, <4 x i32> %b, <4 x i1> splat (i1 true), i32 %evl)
468  ret <4 x i32> %v
469}
470
471define <4 x i32> @vdiv_vx_v4i32(<4 x i32> %va, i32 %b, <4 x i1> %m, i32 zeroext %evl) {
472; CHECK-LABEL: vdiv_vx_v4i32:
473; CHECK:       # %bb.0:
474; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
475; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
476; CHECK-NEXT:    ret
477  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0
478  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer
479  %v = call <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> %m, i32 %evl)
480  ret <4 x i32> %v
481}
482
483define <4 x i32> @vdiv_vx_v4i32_unmasked(<4 x i32> %va, i32 %b, i32 zeroext %evl) {
484; CHECK-LABEL: vdiv_vx_v4i32_unmasked:
485; CHECK:       # %bb.0:
486; CHECK-NEXT:    vsetvli zero, a1, e32, m1, ta, ma
487; CHECK-NEXT:    vdiv.vx v8, v8, a0
488; CHECK-NEXT:    ret
489  %elt.head = insertelement <4 x i32> poison, i32 %b, i32 0
490  %vb = shufflevector <4 x i32> %elt.head, <4 x i32> poison, <4 x i32> zeroinitializer
491  %v = call <4 x i32> @llvm.vp.sdiv.v4i32(<4 x i32> %va, <4 x i32> %vb, <4 x i1> splat (i1 true), i32 %evl)
492  ret <4 x i32> %v
493}
494
495declare <8 x i32> @llvm.vp.sdiv.v8i32(<8 x i32>, <8 x i32>, <8 x i1>, i32)
496
497define <8 x i32> @vdiv_vv_v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 zeroext %evl) {
498; CHECK-LABEL: vdiv_vv_v8i32:
499; CHECK:       # %bb.0:
500; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
501; CHECK-NEXT:    vdiv.vv v8, v8, v10, v0.t
502; CHECK-NEXT:    ret
503  %v = call <8 x i32> @llvm.vp.sdiv.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> %m, i32 %evl)
504  ret <8 x i32> %v
505}
506
507define <8 x i32> @vdiv_vv_v8i32_unmasked(<8 x i32> %va, <8 x i32> %b, i32 zeroext %evl) {
508; CHECK-LABEL: vdiv_vv_v8i32_unmasked:
509; CHECK:       # %bb.0:
510; CHECK-NEXT:    vsetvli zero, a0, e32, m2, ta, ma
511; CHECK-NEXT:    vdiv.vv v8, v8, v10
512; CHECK-NEXT:    ret
513  %v = call <8 x i32> @llvm.vp.sdiv.v8i32(<8 x i32> %va, <8 x i32> %b, <8 x i1> splat (i1 true), i32 %evl)
514  ret <8 x i32> %v
515}
516
517define <8 x i32> @vdiv_vx_v8i32(<8 x i32> %va, i32 %b, <8 x i1> %m, i32 zeroext %evl) {
518; CHECK-LABEL: vdiv_vx_v8i32:
519; CHECK:       # %bb.0:
520; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
521; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
522; CHECK-NEXT:    ret
523  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
524  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
525  %v = call <8 x i32> @llvm.vp.sdiv.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> %m, i32 %evl)
526  ret <8 x i32> %v
527}
528
529define <8 x i32> @vdiv_vx_v8i32_unmasked(<8 x i32> %va, i32 %b, i32 zeroext %evl) {
530; CHECK-LABEL: vdiv_vx_v8i32_unmasked:
531; CHECK:       # %bb.0:
532; CHECK-NEXT:    vsetvli zero, a1, e32, m2, ta, ma
533; CHECK-NEXT:    vdiv.vx v8, v8, a0
534; CHECK-NEXT:    ret
535  %elt.head = insertelement <8 x i32> poison, i32 %b, i32 0
536  %vb = shufflevector <8 x i32> %elt.head, <8 x i32> poison, <8 x i32> zeroinitializer
537  %v = call <8 x i32> @llvm.vp.sdiv.v8i32(<8 x i32> %va, <8 x i32> %vb, <8 x i1> splat (i1 true), i32 %evl)
538  ret <8 x i32> %v
539}
540
541declare <16 x i32> @llvm.vp.sdiv.v16i32(<16 x i32>, <16 x i32>, <16 x i1>, i32)
542
543define <16 x i32> @vdiv_vv_v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 zeroext %evl) {
544; CHECK-LABEL: vdiv_vv_v16i32:
545; CHECK:       # %bb.0:
546; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
547; CHECK-NEXT:    vdiv.vv v8, v8, v12, v0.t
548; CHECK-NEXT:    ret
549  %v = call <16 x i32> @llvm.vp.sdiv.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> %m, i32 %evl)
550  ret <16 x i32> %v
551}
552
553define <16 x i32> @vdiv_vv_v16i32_unmasked(<16 x i32> %va, <16 x i32> %b, i32 zeroext %evl) {
554; CHECK-LABEL: vdiv_vv_v16i32_unmasked:
555; CHECK:       # %bb.0:
556; CHECK-NEXT:    vsetvli zero, a0, e32, m4, ta, ma
557; CHECK-NEXT:    vdiv.vv v8, v8, v12
558; CHECK-NEXT:    ret
559  %v = call <16 x i32> @llvm.vp.sdiv.v16i32(<16 x i32> %va, <16 x i32> %b, <16 x i1> splat (i1 true), i32 %evl)
560  ret <16 x i32> %v
561}
562
563define <16 x i32> @vdiv_vx_v16i32(<16 x i32> %va, i32 %b, <16 x i1> %m, i32 zeroext %evl) {
564; CHECK-LABEL: vdiv_vx_v16i32:
565; CHECK:       # %bb.0:
566; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
567; CHECK-NEXT:    vdiv.vx v8, v8, a0, v0.t
568; CHECK-NEXT:    ret
569  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0
570  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer
571  %v = call <16 x i32> @llvm.vp.sdiv.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> %m, i32 %evl)
572  ret <16 x i32> %v
573}
574
575define <16 x i32> @vdiv_vx_v16i32_unmasked(<16 x i32> %va, i32 %b, i32 zeroext %evl) {
576; CHECK-LABEL: vdiv_vx_v16i32_unmasked:
577; CHECK:       # %bb.0:
578; CHECK-NEXT:    vsetvli zero, a1, e32, m4, ta, ma
579; CHECK-NEXT:    vdiv.vx v8, v8, a0
580; CHECK-NEXT:    ret
581  %elt.head = insertelement <16 x i32> poison, i32 %b, i32 0
582  %vb = shufflevector <16 x i32> %elt.head, <16 x i32> poison, <16 x i32> zeroinitializer
583  %v = call <16 x i32> @llvm.vp.sdiv.v16i32(<16 x i32> %va, <16 x i32> %vb, <16 x i1> splat (i1 true), i32 %evl)
584  ret <16 x i32> %v
585}
586
587declare <2 x i64> @llvm.vp.sdiv.v2i64(<2 x i64>, <2 x i64>, <2 x i1>, i32)
588
589define <2 x i64> @vdiv_vv_v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 zeroext %evl) {
590; CHECK-LABEL: vdiv_vv_v2i64:
591; CHECK:       # %bb.0:
592; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
593; CHECK-NEXT:    vdiv.vv v8, v8, v9, v0.t
594; CHECK-NEXT:    ret
595  %v = call <2 x i64> @llvm.vp.sdiv.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> %m, i32 %evl)
596  ret <2 x i64> %v
597}
598
599define <2 x i64> @vdiv_vv_v2i64_unmasked(<2 x i64> %va, <2 x i64> %b, i32 zeroext %evl) {
600; CHECK-LABEL: vdiv_vv_v2i64_unmasked:
601; CHECK:       # %bb.0:
602; CHECK-NEXT:    vsetvli zero, a0, e64, m1, ta, ma
603; CHECK-NEXT:    vdiv.vv v8, v8, v9
604; CHECK-NEXT:    ret
605  %v = call <2 x i64> @llvm.vp.sdiv.v2i64(<2 x i64> %va, <2 x i64> %b, <2 x i1> splat (i1 true), i32 %evl)
606  ret <2 x i64> %v
607}
608
609define <2 x i64> @vdiv_vx_v2i64(<2 x i64> %va, i64 %b, <2 x i1> %m, i32 zeroext %evl) {
610; RV32-LABEL: vdiv_vx_v2i64:
611; RV32:       # %bb.0:
612; RV32-NEXT:    addi sp, sp, -16
613; RV32-NEXT:    .cfi_def_cfa_offset 16
614; RV32-NEXT:    sw a0, 8(sp)
615; RV32-NEXT:    sw a1, 12(sp)
616; RV32-NEXT:    addi a0, sp, 8
617; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
618; RV32-NEXT:    vlse64.v v9, (a0), zero
619; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
620; RV32-NEXT:    vdiv.vv v8, v8, v9, v0.t
621; RV32-NEXT:    addi sp, sp, 16
622; RV32-NEXT:    .cfi_def_cfa_offset 0
623; RV32-NEXT:    ret
624;
625; RV64-LABEL: vdiv_vx_v2i64:
626; RV64:       # %bb.0:
627; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
628; RV64-NEXT:    vdiv.vx v8, v8, a0, v0.t
629; RV64-NEXT:    ret
630  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0
631  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer
632  %v = call <2 x i64> @llvm.vp.sdiv.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> %m, i32 %evl)
633  ret <2 x i64> %v
634}
635
636define <2 x i64> @vdiv_vx_v2i64_unmasked(<2 x i64> %va, i64 %b, i32 zeroext %evl) {
637; RV32-LABEL: vdiv_vx_v2i64_unmasked:
638; RV32:       # %bb.0:
639; RV32-NEXT:    addi sp, sp, -16
640; RV32-NEXT:    .cfi_def_cfa_offset 16
641; RV32-NEXT:    sw a0, 8(sp)
642; RV32-NEXT:    sw a1, 12(sp)
643; RV32-NEXT:    addi a0, sp, 8
644; RV32-NEXT:    vsetivli zero, 2, e64, m1, ta, ma
645; RV32-NEXT:    vlse64.v v9, (a0), zero
646; RV32-NEXT:    vsetvli zero, a2, e64, m1, ta, ma
647; RV32-NEXT:    vdiv.vv v8, v8, v9
648; RV32-NEXT:    addi sp, sp, 16
649; RV32-NEXT:    .cfi_def_cfa_offset 0
650; RV32-NEXT:    ret
651;
652; RV64-LABEL: vdiv_vx_v2i64_unmasked:
653; RV64:       # %bb.0:
654; RV64-NEXT:    vsetvli zero, a1, e64, m1, ta, ma
655; RV64-NEXT:    vdiv.vx v8, v8, a0
656; RV64-NEXT:    ret
657  %elt.head = insertelement <2 x i64> poison, i64 %b, i32 0
658  %vb = shufflevector <2 x i64> %elt.head, <2 x i64> poison, <2 x i32> zeroinitializer
659  %v = call <2 x i64> @llvm.vp.sdiv.v2i64(<2 x i64> %va, <2 x i64> %vb, <2 x i1> splat (i1 true), i32 %evl)
660  ret <2 x i64> %v
661}
662
663declare <4 x i64> @llvm.vp.sdiv.v4i64(<4 x i64>, <4 x i64>, <4 x i1>, i32)
664
665define <4 x i64> @vdiv_vv_v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 zeroext %evl) {
666; CHECK-LABEL: vdiv_vv_v4i64:
667; CHECK:       # %bb.0:
668; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
669; CHECK-NEXT:    vdiv.vv v8, v8, v10, v0.t
670; CHECK-NEXT:    ret
671  %v = call <4 x i64> @llvm.vp.sdiv.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> %m, i32 %evl)
672  ret <4 x i64> %v
673}
674
675define <4 x i64> @vdiv_vv_v4i64_unmasked(<4 x i64> %va, <4 x i64> %b, i32 zeroext %evl) {
676; CHECK-LABEL: vdiv_vv_v4i64_unmasked:
677; CHECK:       # %bb.0:
678; CHECK-NEXT:    vsetvli zero, a0, e64, m2, ta, ma
679; CHECK-NEXT:    vdiv.vv v8, v8, v10
680; CHECK-NEXT:    ret
681  %v = call <4 x i64> @llvm.vp.sdiv.v4i64(<4 x i64> %va, <4 x i64> %b, <4 x i1> splat (i1 true), i32 %evl)
682  ret <4 x i64> %v
683}
684
685define <4 x i64> @vdiv_vx_v4i64(<4 x i64> %va, i64 %b, <4 x i1> %m, i32 zeroext %evl) {
686; RV32-LABEL: vdiv_vx_v4i64:
687; RV32:       # %bb.0:
688; RV32-NEXT:    addi sp, sp, -16
689; RV32-NEXT:    .cfi_def_cfa_offset 16
690; RV32-NEXT:    sw a0, 8(sp)
691; RV32-NEXT:    sw a1, 12(sp)
692; RV32-NEXT:    addi a0, sp, 8
693; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
694; RV32-NEXT:    vlse64.v v10, (a0), zero
695; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma
696; RV32-NEXT:    vdiv.vv v8, v8, v10, v0.t
697; RV32-NEXT:    addi sp, sp, 16
698; RV32-NEXT:    .cfi_def_cfa_offset 0
699; RV32-NEXT:    ret
700;
701; RV64-LABEL: vdiv_vx_v4i64:
702; RV64:       # %bb.0:
703; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
704; RV64-NEXT:    vdiv.vx v8, v8, a0, v0.t
705; RV64-NEXT:    ret
706  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0
707  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer
708  %v = call <4 x i64> @llvm.vp.sdiv.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> %m, i32 %evl)
709  ret <4 x i64> %v
710}
711
712define <4 x i64> @vdiv_vx_v4i64_unmasked(<4 x i64> %va, i64 %b, i32 zeroext %evl) {
713; RV32-LABEL: vdiv_vx_v4i64_unmasked:
714; RV32:       # %bb.0:
715; RV32-NEXT:    addi sp, sp, -16
716; RV32-NEXT:    .cfi_def_cfa_offset 16
717; RV32-NEXT:    sw a0, 8(sp)
718; RV32-NEXT:    sw a1, 12(sp)
719; RV32-NEXT:    addi a0, sp, 8
720; RV32-NEXT:    vsetivli zero, 4, e64, m2, ta, ma
721; RV32-NEXT:    vlse64.v v10, (a0), zero
722; RV32-NEXT:    vsetvli zero, a2, e64, m2, ta, ma
723; RV32-NEXT:    vdiv.vv v8, v8, v10
724; RV32-NEXT:    addi sp, sp, 16
725; RV32-NEXT:    .cfi_def_cfa_offset 0
726; RV32-NEXT:    ret
727;
728; RV64-LABEL: vdiv_vx_v4i64_unmasked:
729; RV64:       # %bb.0:
730; RV64-NEXT:    vsetvli zero, a1, e64, m2, ta, ma
731; RV64-NEXT:    vdiv.vx v8, v8, a0
732; RV64-NEXT:    ret
733  %elt.head = insertelement <4 x i64> poison, i64 %b, i32 0
734  %vb = shufflevector <4 x i64> %elt.head, <4 x i64> poison, <4 x i32> zeroinitializer
735  %v = call <4 x i64> @llvm.vp.sdiv.v4i64(<4 x i64> %va, <4 x i64> %vb, <4 x i1> splat (i1 true), i32 %evl)
736  ret <4 x i64> %v
737}
738
739declare <8 x i64> @llvm.vp.sdiv.v8i64(<8 x i64>, <8 x i64>, <8 x i1>, i32)
740
741define <8 x i64> @vdiv_vv_v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 zeroext %evl) {
742; CHECK-LABEL: vdiv_vv_v8i64:
743; CHECK:       # %bb.0:
744; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
745; CHECK-NEXT:    vdiv.vv v8, v8, v12, v0.t
746; CHECK-NEXT:    ret
747  %v = call <8 x i64> @llvm.vp.sdiv.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> %m, i32 %evl)
748  ret <8 x i64> %v
749}
750
751define <8 x i64> @vdiv_vv_v8i64_unmasked(<8 x i64> %va, <8 x i64> %b, i32 zeroext %evl) {
752; CHECK-LABEL: vdiv_vv_v8i64_unmasked:
753; CHECK:       # %bb.0:
754; CHECK-NEXT:    vsetvli zero, a0, e64, m4, ta, ma
755; CHECK-NEXT:    vdiv.vv v8, v8, v12
756; CHECK-NEXT:    ret
757  %v = call <8 x i64> @llvm.vp.sdiv.v8i64(<8 x i64> %va, <8 x i64> %b, <8 x i1> splat (i1 true), i32 %evl)
758  ret <8 x i64> %v
759}
760
761define <8 x i64> @vdiv_vx_v8i64(<8 x i64> %va, i64 %b, <8 x i1> %m, i32 zeroext %evl) {
762; RV32-LABEL: vdiv_vx_v8i64:
763; RV32:       # %bb.0:
764; RV32-NEXT:    addi sp, sp, -16
765; RV32-NEXT:    .cfi_def_cfa_offset 16
766; RV32-NEXT:    sw a0, 8(sp)
767; RV32-NEXT:    sw a1, 12(sp)
768; RV32-NEXT:    addi a0, sp, 8
769; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
770; RV32-NEXT:    vlse64.v v12, (a0), zero
771; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
772; RV32-NEXT:    vdiv.vv v8, v8, v12, v0.t
773; RV32-NEXT:    addi sp, sp, 16
774; RV32-NEXT:    .cfi_def_cfa_offset 0
775; RV32-NEXT:    ret
776;
777; RV64-LABEL: vdiv_vx_v8i64:
778; RV64:       # %bb.0:
779; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
780; RV64-NEXT:    vdiv.vx v8, v8, a0, v0.t
781; RV64-NEXT:    ret
782  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
783  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
784  %v = call <8 x i64> @llvm.vp.sdiv.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> %m, i32 %evl)
785  ret <8 x i64> %v
786}
787
788define <8 x i64> @vdiv_vx_v8i64_unmasked(<8 x i64> %va, i64 %b, i32 zeroext %evl) {
789; RV32-LABEL: vdiv_vx_v8i64_unmasked:
790; RV32:       # %bb.0:
791; RV32-NEXT:    addi sp, sp, -16
792; RV32-NEXT:    .cfi_def_cfa_offset 16
793; RV32-NEXT:    sw a0, 8(sp)
794; RV32-NEXT:    sw a1, 12(sp)
795; RV32-NEXT:    addi a0, sp, 8
796; RV32-NEXT:    vsetivli zero, 8, e64, m4, ta, ma
797; RV32-NEXT:    vlse64.v v12, (a0), zero
798; RV32-NEXT:    vsetvli zero, a2, e64, m4, ta, ma
799; RV32-NEXT:    vdiv.vv v8, v8, v12
800; RV32-NEXT:    addi sp, sp, 16
801; RV32-NEXT:    .cfi_def_cfa_offset 0
802; RV32-NEXT:    ret
803;
804; RV64-LABEL: vdiv_vx_v8i64_unmasked:
805; RV64:       # %bb.0:
806; RV64-NEXT:    vsetvli zero, a1, e64, m4, ta, ma
807; RV64-NEXT:    vdiv.vx v8, v8, a0
808; RV64-NEXT:    ret
809  %elt.head = insertelement <8 x i64> poison, i64 %b, i32 0
810  %vb = shufflevector <8 x i64> %elt.head, <8 x i64> poison, <8 x i32> zeroinitializer
811  %v = call <8 x i64> @llvm.vp.sdiv.v8i64(<8 x i64> %va, <8 x i64> %vb, <8 x i1> splat (i1 true), i32 %evl)
812  ret <8 x i64> %v
813}
814
815declare <16 x i64> @llvm.vp.sdiv.v16i64(<16 x i64>, <16 x i64>, <16 x i1>, i32)
816
817define <16 x i64> @vdiv_vv_v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 zeroext %evl) {
818; CHECK-LABEL: vdiv_vv_v16i64:
819; CHECK:       # %bb.0:
820; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
821; CHECK-NEXT:    vdiv.vv v8, v8, v16, v0.t
822; CHECK-NEXT:    ret
823  %v = call <16 x i64> @llvm.vp.sdiv.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> %m, i32 %evl)
824  ret <16 x i64> %v
825}
826
827define <16 x i64> @vdiv_vv_v16i64_unmasked(<16 x i64> %va, <16 x i64> %b, i32 zeroext %evl) {
828; CHECK-LABEL: vdiv_vv_v16i64_unmasked:
829; CHECK:       # %bb.0:
830; CHECK-NEXT:    vsetvli zero, a0, e64, m8, ta, ma
831; CHECK-NEXT:    vdiv.vv v8, v8, v16
832; CHECK-NEXT:    ret
833  %v = call <16 x i64> @llvm.vp.sdiv.v16i64(<16 x i64> %va, <16 x i64> %b, <16 x i1> splat (i1 true), i32 %evl)
834  ret <16 x i64> %v
835}
836
837define <16 x i64> @vdiv_vx_v16i64(<16 x i64> %va, i64 %b, <16 x i1> %m, i32 zeroext %evl) {
838; RV32-LABEL: vdiv_vx_v16i64:
839; RV32:       # %bb.0:
840; RV32-NEXT:    addi sp, sp, -16
841; RV32-NEXT:    .cfi_def_cfa_offset 16
842; RV32-NEXT:    sw a0, 8(sp)
843; RV32-NEXT:    sw a1, 12(sp)
844; RV32-NEXT:    addi a0, sp, 8
845; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
846; RV32-NEXT:    vlse64.v v16, (a0), zero
847; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
848; RV32-NEXT:    vdiv.vv v8, v8, v16, v0.t
849; RV32-NEXT:    addi sp, sp, 16
850; RV32-NEXT:    .cfi_def_cfa_offset 0
851; RV32-NEXT:    ret
852;
853; RV64-LABEL: vdiv_vx_v16i64:
854; RV64:       # %bb.0:
855; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
856; RV64-NEXT:    vdiv.vx v8, v8, a0, v0.t
857; RV64-NEXT:    ret
858  %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0
859  %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer
860  %v = call <16 x i64> @llvm.vp.sdiv.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> %m, i32 %evl)
861  ret <16 x i64> %v
862}
863
864define <16 x i64> @vdiv_vx_v16i64_unmasked(<16 x i64> %va, i64 %b, i32 zeroext %evl) {
865; RV32-LABEL: vdiv_vx_v16i64_unmasked:
866; RV32:       # %bb.0:
867; RV32-NEXT:    addi sp, sp, -16
868; RV32-NEXT:    .cfi_def_cfa_offset 16
869; RV32-NEXT:    sw a0, 8(sp)
870; RV32-NEXT:    sw a1, 12(sp)
871; RV32-NEXT:    addi a0, sp, 8
872; RV32-NEXT:    vsetivli zero, 16, e64, m8, ta, ma
873; RV32-NEXT:    vlse64.v v16, (a0), zero
874; RV32-NEXT:    vsetvli zero, a2, e64, m8, ta, ma
875; RV32-NEXT:    vdiv.vv v8, v8, v16
876; RV32-NEXT:    addi sp, sp, 16
877; RV32-NEXT:    .cfi_def_cfa_offset 0
878; RV32-NEXT:    ret
879;
880; RV64-LABEL: vdiv_vx_v16i64_unmasked:
881; RV64:       # %bb.0:
882; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, ma
883; RV64-NEXT:    vdiv.vx v8, v8, a0
884; RV64-NEXT:    ret
885  %elt.head = insertelement <16 x i64> poison, i64 %b, i32 0
886  %vb = shufflevector <16 x i64> %elt.head, <16 x i64> poison, <16 x i32> zeroinitializer
887  %v = call <16 x i64> @llvm.vp.sdiv.v16i64(<16 x i64> %va, <16 x i64> %vb, <16 x i1> splat (i1 true), i32 %evl)
888  ret <16 x i64> %v
889}
890
891
892declare <3 x i8> @llvm.vp.sdiv.v3i8(<3 x i8>, <3 x i8>, <3 x i1>, i32)
893
894define <3 x i8> @vdiv_vv_v3i8_unmasked(<3 x i8> %va, <3 x i8> %b, i32 zeroext %evl) {
895; CHECK-LABEL: vdiv_vv_v3i8_unmasked:
896; CHECK:       # %bb.0:
897; CHECK-NEXT:    vsetvli zero, a0, e8, mf4, ta, ma
898; CHECK-NEXT:    vdiv.vv v8, v8, v9
899; CHECK-NEXT:    ret
900  %v = call <3 x i8> @llvm.vp.sdiv.v3i8(<3 x i8> %va, <3 x i8> %b, <3 x i1> splat (i1 true), i32 %evl)
901  ret <3 x i8> %v
902}
903
904define <3 x i8> @vdiv_vv_v3i8_unmasked_avl3(<3 x i8> %va, <3 x i8> %b) {
905; CHECK-LABEL: vdiv_vv_v3i8_unmasked_avl3:
906; CHECK:       # %bb.0:
907; CHECK-NEXT:    vsetivli zero, 3, e8, mf4, ta, ma
908; CHECK-NEXT:    vdiv.vv v8, v8, v9
909; CHECK-NEXT:    ret
910  %v = call <3 x i8> @llvm.vp.sdiv.v3i8(<3 x i8> %va, <3 x i8> %b, <3 x i1> splat (i1 true), i32 3)
911  ret <3 x i8> %v
912}
913
914declare <7 x i8> @llvm.vp.sdiv.v7i8(<7 x i8>, <7 x i8>, <7 x i1>, i32)
915
916define <7 x i8> @vdiv_vv_v7i8_unmasked(<7 x i8> %va, <7 x i8> %b, i32 zeroext %evl) {
917; CHECK-LABEL: vdiv_vv_v7i8_unmasked:
918; CHECK:       # %bb.0:
919; CHECK-NEXT:    vsetvli zero, a0, e8, mf2, ta, ma
920; CHECK-NEXT:    vdiv.vv v8, v8, v9
921; CHECK-NEXT:    ret
922  %v = call <7 x i8> @llvm.vp.sdiv.v7i8(<7 x i8> %va, <7 x i8> %b, <7 x i1> splat (i1 true), i32 %evl)
923  ret <7 x i8> %v
924}
925
926define <7 x i8> @vdiv_vv_v7i8_unmasked_avl7(<7 x i8> %va, <7 x i8> %b) {
927; CHECK-LABEL: vdiv_vv_v7i8_unmasked_avl7:
928; CHECK:       # %bb.0:
929; CHECK-NEXT:    vsetivli zero, 7, e8, mf2, ta, ma
930; CHECK-NEXT:    vdiv.vv v8, v8, v9
931; CHECK-NEXT:    ret
932  %v = call <7 x i8> @llvm.vp.sdiv.v7i8(<7 x i8> %va, <7 x i8> %b, <7 x i1> splat (i1 true), i32 7)
933  ret <7 x i8> %v
934}
935